Andrea Pugliese
Affiliations:- University of Calabria, Department of Electronics, Computer Science and Systems, Italy
According to our database1,
Andrea Pugliese
authored at least 17 papers
between 2005 and 2012.
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Bibliography
2012
Int. J. Circuit Theory Appl., 2012
Int. J. Circuit Theory Appl., 2012
2011
Int. J. Circuit Theory Appl., 2011
2010
Corrections to "Settling Time Optimization for Three-Stage CMOS Amplifier Topologies" [Dec 09 2569-2582].
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Microelectron. J., 2010
2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
Design considerations for fast-settling two-stage Miller-compensated operational amplifiers.
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2008
Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers.
IEEE Trans. Circuits Syst. II Express Briefs, 2008
Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2007
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
2005
Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation.
Proceedings of the Integrated Circuit and System Design, 2005