Andreas Dandalis

According to our database1, Andreas Dandalis authored at least 12 papers between 1997 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
Configuration compression for FPGA-based embedded systems.
IEEE Trans. Very Large Scale Integr. Syst., 2005

2004
An adaptive cryptographic engine for internet protocol security architectures.
ACM Trans. Design Autom. Electr. Syst., 2004

2002
Run-time performance optimization of an FPGA-based deduction engine for SAT solvers.
ACM Trans. Design Autom. Electr. Syst., 2002

2001
Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers.
Proceedings of the Field-Programmable Logic and Applications, 2001

2000
Efficient Self-Reconfigurable Implementations Using On-chip Memory.
Proceedings of the Field-Programmable Logic and Applications, 2000

A Parallel Pipelined SAT Solver for FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2000

An Adaptive Cryptographic Engine for IPSec Architectures.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

A Comparative Study of Performance of AES Final Candidates Using FPGAs.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2000

1999
Domain Specific Mapping for Solving Graph Problems on Reconfigurable Devices.
Proceedings of the Parallel and Distributed Processing, 1999

1998
Space-efficient Mapping of 2D-DCT onto Dynamically Configurable Coarse-Grained Architectures.
Proceedings of the Field-Programmable Logic and Applications, 1998

Mapping Homogeneous Computations onto Dynamically Configurable Coarse-Grained Architectures.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997
Fast parallel implementation of DFT using configurable devices.
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997


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