Viktor K. Prasanna

According to our database1, Viktor K. Prasanna authored at least 622 papers between 1984 and 2018.

Collaborative distances:

Awards

ACM Fellow

ACM Fellow 2007, "For contributions to parallel, distributed and reconfigurable computing.".

IEEE Fellow

IEEE Fellow 1996, "For contributions to parallel architectures and algorithms.".

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
Other 

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Homepages:

On csauthors.net:

Bibliography

2018
Sketch Acceleration on FPGA and its Applications in Network Anomaly Detection.
IEEE Trans. Parallel Distrib. Syst., 2018

GPOP: A cache- and work-efficient framework for Graph Processing Over Partitions.
CoRR, 2018

Not all Embeddings are created Equal: Extracting Entity-specific Substructures for RDF Graph Embedding.
CoRR, 2018

ASQFor: Automatic SPARQL query formulation for the non-expert.
AI Commun., 2018

Accelerating PageRank using Partition-Centric Processing.
Proceedings of the 2018 USENIX Annual Technical Conference, 2018

NO-LESS: Near optimal curtailment strategy selection for net load balancing in micro grids.
Proceedings of the 2018 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2018

Risk aware net load balancing in micro grids with high DER penetration.
Proceedings of the 2018 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2018

Temporal ensemble learning of univariate methods for short term load forecasting.
Proceedings of the 2018 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2018

Extracting Entity-Specific Substructures for RDF Graph Embedding.
Proceedings of the 2018 IEEE International Conference on Information Reuse and Integration, 2018

RAW 2018 Invited Talks.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

FASTCF: FPGA-based Accelerator for STochastic-Gradient-Descent-based Collaborative Filtering.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

A Framework for Generating High Throughput CNN Implementations on FPGAs.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

An FPGA framework for edge-centric graph processing.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

FActCheck: Keeping Activation of Fake News at Check.
Proceedings of the 17th International Conference on Autonomous Agents and MultiAgent Systems, 2018

2017
The First 25 Years of the FPL Conference: Significant Papers.
TRETS, 2017

Accelerating Decision Tree Based Traffic Classification on FPGA and Multicore Platforms.
IEEE Trans. Parallel Distrib. Syst., 2017

Computer Generation of High Throughput and Memory Efficient Sorting Designs on FPGA.
IEEE Trans. Parallel Distrib. Syst., 2017

Optimal dynamic data layouts for 2D FFT on 3D memory integrated FPGA.
The Journal of Supercomputing, 2017

The STREAM Mechanism for CPS Security The Case of the Smart Grid.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Knowledge-infused and consistent Complex Event Processing over real-time and persistent streams.
Future Generation Comp. Syst., 2017

Accelerating PageRank using Partition-Centric Processing.
CoRR, 2017

Optimal Net-Load Balancing in Smart Grids with High PV Penetration.
CoRR, 2017

Optimal net-load balancing in smart grids with high PV penetration.
Proceedings of the 4th ACM International Conference on Systems for Energy-Efficient Built Environments, 2017

Accelerating Graph Analytics on CPU-FPGA Heterogeneous Platform.
Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017

Accelerating low rank matrix completion on FPGA.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

Fast generation of high throughput customized deep learning accelerators on FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

PReSS towards a secure smart grid: Protection recommendations against smart spoofing.
Proceedings of the IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2017

Design and implementation of parallel PageRank on multicore platforms.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

OSCAR: Optimizing SCrAtchpad reuse for graph processing.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

Optimal data layout for block-level random accesses to scratchpad.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

Quickly finding a truss in a haystack.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

ReCALL: Reordered Cache Aware Locality Based Graph Processing.
Proceedings of the 24th IEEE International Conference on High Performance Computing, 2017

Frequency Domain Acceleration of Convolutional Neural Networks on CPU-FPGA Shared Memory System.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Optimal Circuits for Parallel Bit Reversal.
Proceedings of the 54th Annual Design Automation Conference, 2017

Spatio-Temporal Modeling of Criminal Activity.
Proceedings of the 2nd International Workshop on Social Sensing, 2017

DeepFlow: a deep learning framework for software-defined measurement.
Proceedings of the 2nd Workshop on Cloud-Assisted Networking, 2017

OReONet: Deep convolutional network for oil reservoir optimization.
Proceedings of the 2017 IEEE International Conference on Big Data, BigData 2017, 2017

Fast and efficient implementation of Convolutional Neural Networks on FPGA.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

Automatic Integration and Querying of Semantic Rich Heterogeneous Data: Laying the Foundations for Semantic Web of Things.
Proceedings of the Managing the Web of Things: Linking the Real World to the Web, 2017

2016
Towards Dynamic Demand Response On Efficient Consumer Grouping Algorithmics.
T-SUSC, 2016

Fast Online Set Intersection for Network Processing on FPGA.
IEEE Trans. Parallel Distrib. Syst., 2016

High-Performance and Dynamically Updatable Packet Classification Engine on FPGA.
IEEE Trans. Parallel Distrib. Syst., 2016

MATCH for the Prosumer Smart Grid The Algorithmics of Real-Time Power Balance.
IEEE Trans. Parallel Distrib. Syst., 2016

Computing competing cascades on signed networks.
Social Netw. Analys. Mining, 2016

Compact hash tables for decision-trees.
Parallel Computing, 2016

Message from the Editor-in-Chief.
J. Parallel Distrib. Comput., 2016

Sensors to Events: Semantic Modeling and Recognition of Events from Data Streams.
Int. J. Semantic Computing, 2016

Knowledge-infused and Consistent Complex Event Processing over Real-time and Persistent Streams.
CoRR, 2016

Mining Large Dense Subgraphs.
Proceedings of the 25th International Conference on World Wide Web, 2016

Software defined connected prosumer communities.
Proceedings of the 3rd IEEE World Forum on Internet of Things, 2016

PRIMER - A Regression-Rule Learning System for Intervention Optimization.
Proceedings of the Rule Technologies. Research, Tools, and Applications, 2016

Accelerating Support Count for Association Rule Mining on GPUs.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

High Throughput Large Scale Sorting on a CPU-FPGA Heterogeneous Platform.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Thou Shalt ASQFor and Shalt Receive the Semantic Answer.
Proceedings of the Twenty-Fifth International Joint Conference on Artificial Intelligence, 2016

Implementation of Learning-Based Dynamic Demand Response on a Campus Micro-Grid.
Proceedings of the Twenty-Fifth International Joint Conference on Artificial Intelligence, 2016

Optimal Customer Targeting for Sustainable Demand Response in Smart Grids.
Proceedings of the International Conference on Computational Science 2016, 2016

On-chip memory efficient data layout for 2D FFT on 3D memory integrated FPGA.
Proceedings of the 2016 IEEE High Performance Extreme Computing Conference, 2016

Optimizing interconnection complexity for realizing fixed permutation in data and signal processing algorithms.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

GPU-Accelerated Parameter Optimization for Classification Rule Learning.
Proceedings of the Twenty-Ninth International Florida Artificial Intelligence Research Society Conference, 2016

High-Throughput and Energy-Efficient Graph Processing on FPGA.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Accelerating Equi-Join on a CPU-FPGA Heterogeneous Platform.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Distributed exact subgraph matching in small diameter dynamic graphs.
Proceedings of the 2016 IEEE International Conference on Big Data, 2016

FPGA-Based Acceleration of Pattern Matching in YARA.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

Learning to REDUCE: A Reduced Electricity Consumption Prediction Ensemble.
Proceedings of the AI for Smart Grids and Smart Buildings, 2016

2015
Packet Classification on Multi-core Platforms.
Proceedings of the Handbook on Data Centers, 2015

Network Virtualization in Data Centers: A Data Plane Perspective.
Proceedings of the Handbook on Data Centers, 2015

Holistic Measures for Evaluating Prediction Models in Smart Grids.
IEEE Trans. Knowl. Data Eng., 2015

Reactive Resource Provisioning Heuristics for Dynamic Dataflows on Cloud Infrastructure.
IEEE Trans. Cloud Computing, 2015

The unified model of social influence and its application in influence maximization.
Social Netw. Analys. Mining, 2015

High Throughput Sketch Based Online Heavy Hitter Detection on FPGA.
SIGARCH Computer Architecture News, 2015

A Decomposition-Based Approach for Scalable Many-Field Packet Classification on Multi-core Processors.
International Journal of Parallel Programming, 2015

Prediction models for dynamic demand response: Requirements, challenges, and insights.
Proceedings of the 2015 IEEE International Conference on Smart Grid Communications, 2015

Personalized trip planning by integrating multimodal user-generated content.
Proceedings of the 9th IEEE International Conference on Semantic Computing, 2015

Optimizing memory performance for FPGA implementation of pagerank.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

High throughput sketch based online heavy change detection on FPGA.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

A hybrid design for high performance large-scale sorting on FPGA.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Learning of Performance Measures from Crowd-Sourced Data with Application to Ranking of Investments.
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2015

Optimal Dynamic Data Layouts for 2D FFT on 3D Memory Integrated FPGA.
Proceedings of the Parallel Computing Technologies - 13th International Conference, PaCT 2015, Petrozavodsk, Russia, August 31, 2015

Model-based assessment for balancing privacy requirements and operational capabilities in the smart grid.
Proceedings of the 2015 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2015

Integration of Heterogeneous Web Services for Event-Based Social Networks.
Proceedings of the 2015 IEEE International Conference on Information Reuse and Integration, 2015

Computational Cost of Querying for Related Entities in Different Ontologies.
Proceedings of the 2015 IEEE International Conference on Information Reuse and Integration, 2015

Accelerating Large-Scale Single-Source Shortest Path on FPGA.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Empowering Fast Incremental Computation over Large Scale Dynamic Graphs.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

High-Throughput Online Hash Table on FPGA.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Performance Modeling of Matrix Multiplication on 3D Memory Integrated FPGA.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Distributed Programming over Time-Series Graphs.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

RAW 2015 Keynote.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Model-driven Privacy Assessment in the Smart Grid.
Proceedings of the ICISSP 2015, 2015

Fault-Tolerant and Elastic Streaming MapReduce with Decentralized Coordination.
Proceedings of the 35th IEEE International Conference on Distributed Computing Systems, 2015

High Throughput Hierarchical Heavy Hitter Detection in Data Streams.
Proceedings of the 22nd IEEE International Conference on High Performance Computing, 2015

Scalable GPU-Accelerated IPv6 Lookup Using Hierarchical Perfect Hashing.
Proceedings of the 2015 IEEE Global Communications Conference, 2015

Power-efficient range-match-based packet classification on FPGA.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Significant papers from the first 25 years of the FPL conference.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Automatic generation of high throughput energy efficient streaming architectures for arbitrary fixed permutations.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Efficient Generation of Energy and Performance Pareto Front for FPGA Designs (Abstract Only).
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Energy and Memory Efficient Mapping of Bitonic Sorting on FPGA.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Enabling High Throughput and Virtualization for Traffic Classification on FPGA.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

Challenge: On Online Time Series Clustering for Demand Response: Optic - A Theory to Break the 'Curse of Dimensionality'.
Proceedings of the 2015 ACM Sixth International Conference on Future Energy Systems, 2015

Enabling Automated Dynamic Demand Response: From Theory to Practice.
Proceedings of the 2015 ACM Sixth International Conference on Future Energy Systems, 2015

Curtailment Estimation Methods for Demand Response: Lessons Learned by Comparing Apples to Oranges.
Proceedings of the 2015 ACM Sixth International Conference on Future Energy Systems, 2015

Event Extraction from Unstructured Text Data.
Proceedings of the Database and Expert Systems Applications, 2015

UFOMQ: An Algorithm for Querying for Similar Individuals in Heterogeneous Ontologies.
Proceedings of the Big Data Analytics and Knowledge Discovery, 2015

FP-CPNNQ: A Filter-Based Protocol for Continuous Probabilistic Nearest Neighbor Query.
Proceedings of the Database Systems for Advanced Applications, 2015

Real-Time Analytics for Fast Evolving Social Graphs.
Proceedings of the 15th IEEE/ACM International Symposium on Cluster, 2015

Big data analytics for demand response: Clustering over space and time.
Proceedings of the 2015 IEEE International Conference on Big Data, 2015

Social Influence Computation and Maximization in Signed Networks with Competing Cascades.
Proceedings of the 2015 IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining, 2015

Large-scale packet classification on FPGA.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

Towards Performance Modeling of 3D Memory Integrated FPGA Architectures.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

DRAM Row Activation Energy Optimization for Stride Memory Access on FPGA-Based Systems.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

Optimizing Many-field Packet Classification on FPGA, Multi-core General Purpose Processor, and GPU.
Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for networking and communications systems, 2015

Estimating Reduced Consumption for Dynamic Demand Response.
Proceedings of the Computational Sustainability, 2015

Influence-Driven Model for Time Series Prediction from Partial Observations.
Proceedings of the Twenty-Ninth AAAI Conference on Artificial Intelligence, 2015

2014
A Scalable and Modular Architecture for High-Performance Packet Classification.
IEEE Trans. Parallel Distrib. Syst., 2014

Multi-core implementation of decomposition-based packet classification algorithms.
The Journal of Supercomputing, 2014

Computational models of technology adoption at the workplace.
Social Netw. Analys. Mining, 2014

Guest Editorial Deep Packet Inspection: Algorithms, Hardware, and Applications.
IEEE Journal on Selected Areas in Communications, 2014

Introduction to the JPDC special issue on Perspectives on Parallel and Distributed Processing.
J. Parallel Distrib. Comput., 2014

Data Parallel Implementation of Belief Propagation in Factor Graphs on Multi-core Platforms.
International Journal of Parallel Programming, 2014

Scalable Analytics over Distributed Time-series Graphs using GoFFish.
CoRR, 2014

Holistic Measures for Evaluating Prediction Models in Smart Grids.
CoRR, 2014

Semantic Social Network Analysis for the Enterprise.
Computing and Informatics, 2014

A programmable and scalable openflow switch using heterogeneous soc platforms.
Proceedings of the third workshop on Hot topics in software defined networking, 2014

High-Performance Traffic Classification on GPU.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

400 Gbps energy-efficient multi-field packet classification on FPGA.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Energy-efficient histogram on FPGA.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

High-throughput hash-based online traffic classification engines on FPGA.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

UFOM: Unified fuzzy ontology matching.
Proceedings of the 15th IEEE International Conference on Information Reuse and Integration, 2014

Peer review in online forums: Classifying feedback-sentiment.
Proceedings of the 15th IEEE International Conference on Information Reuse and Integration, 2014

Wait-Free Primitives for Initializing Bayesian Network Structure Learning on Multicore Processors.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

A flexible and scalable high-performance OpenFlow switch on heterogeneous SoC platforms.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

Semantic management of Enterprise Integration Patterns: A use case in Smart Grids.
Proceedings of the Workshops Proceedings of the 30th International Conference on Data Engineering Workshops, 2014

High-throughput traffic classification on multi-core processors.
Proceedings of the IEEE 15th International Conference on High Performance Switching and Routing, 2014

Performance modeling and optimizations for decomposition-based large-scale packet classification on multi-core processors.
Proceedings of the IEEE 15th International Conference on High Performance Switching and Routing, 2014

High-performance packet classification on GPU.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Fast parallel algorithm for unfolding of communities in large graphs.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Energy-efficient histogram equalization on FPGA.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Scalable and dynamically updatable lookup engine for decision-trees on FPGA.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Energy performance of FPGAs on PERFECT suite kernels.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Efficient extraction of high centrality vertices in distributed graphs.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Energy- and area-efficient parameterized lifting-based 2-D DWT architecture on FPGA.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Energy optimizations for FPGA-based 2-D FFT architecture.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Efficient customer selection for sustainable demand response in smart grids.
Proceedings of the International Green Computing Conference, 2014

High level performance model based design space exploration for energy-efficient designs on FPGAs.
Proceedings of the International Green Computing Conference, 2014

Energy-efficient parameterized 2-D separable convolution on FPGA.
Proceedings of the International Green Computing Conference, 2014

Algorithmic optimizations for energy efficient throughput-oriented FFT architectures on FPGA.
Proceedings of the International Green Computing Conference, 2014

GoFFish: A Sub-graph Centric Framework for Large-Scale Graph Analytics.
Proceedings of the Euro-Par 2014 Parallel Processing, 2014

The process-oriented event model (PoEM): a conceptual model for industrial events.
Proceedings of the 8th ACM International Conference on Distributed Event-Based Systems, 2014

PLAStiCC: Predictive Look-Ahead Scheduling for Continuous Dataflows on Clouds.
Proceedings of the 14th IEEE/ACM International Symposium on Cluster, 2014

Extracting discriminative shapelets from heterogeneous sensor data.
Proceedings of the 2014 IEEE International Conference on Big Data, 2014

Accurate and efficient selection of the best consumption prediction method in smart grids.
Proceedings of the 2014 IEEE International Conference on Big Data, 2014

Addressing data veracity in big data applications.
Proceedings of the 2014 IEEE International Conference on Big Data, 2014

Influence in social networks: A unified model?
Proceedings of the 2014 IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining, 2014

2013
A bag-of-semantics model for image clustering.
The Visual Computer, 2013

A comprehensive performance analysis of virtual routers on FPGA.
TRETS, 2013

Robust and Scalable String Pattern Matching for Deep Packet Inspection on Multicore Processors.
IEEE Trans. Parallel Distrib. Syst., 2013

Social Link Prediction in Online Social Tagging Systems.
ACM Trans. Inf. Syst., 2013

A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching.
IEEE Trans. Computers, 2013

Data Structure Optimization for Power- Efficient IP Lookup Architectures.
IEEE Trans. Computers, 2013

An empirical analysis of microblogging behavior in the enterprise.
Social Netw. Analys. Mining, 2013

Guest Editorial: Computing Frontiers.
International Journal of Parallel Programming, 2013

Cloud-Based Software Platform for Big Data Analytics in Smart Grids.
Computing in Science and Engineering, 2013

On Using Complex Event Processing for Dynamic Demand Response Optimization in Microgrid.
CoRR, 2013

Sustainable Software Development for Next-Gen Sequencing (NGS) Bioinformatics on Emerging Platforms.
CoRR, 2013

GoFFish: A Sub-Graph Centric Framework for Large-Scale Graph Analytics.
CoRR, 2013

Energy management systems: state of the art and emerging trends.
IEEE Communications Magazine, 2013

Exploiting application dynamism and cloud elasticity for continuous dataflows.
Proceedings of the International Conference for High Performance Computing, 2013

Scalable Many-Field Packet Classification on Multi-core Processors.
Proceedings of the 25th International Symposium on Computer Architecture and High Performance Computing, 2013

Online heavy hitter detector on FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Energy-efficient Median filter on FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Energy-efficient large-scale matrix multiplication on FPGAs.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Optimal mapping of multiple packet lookup schemes onto FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Energy-efficient architecture for stride permutation on streaming data.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Multi-core Implementation of Decomposition-Based Packet Classification Algorithms.
Proceedings of the Parallel Computing Technologies - 12th International Conference, 2013

The Abstract Task Graph: A Methodology for Architecture-Independent Programming of Networked Sensor Systems.
Proceedings of the Workshop on End-to-End, 2013

A Comparison of Ruleset Feature Independent Packet Classification Engines on FPGA.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Optimizations and Analysis of BSP Graph Processing Models on Public Clouds.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

High-Performance Pipelined Architecture for Tree-Based IP Lookup Engine on FPGA.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Wire Speed IPv6 Forwarding on Multi-core Platforms.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Event Recommendation in Social Networks with Linked Data Enablement.
Proceedings of the ICEIS 2013, 2013

Exploring generative models of tripartite graphs for recommendation in social media.
Proceedings of the 4th International Workshop on Modeling Social Media, 2013

Architecture and performance models for scalable IP lookup engines on FPGA.
Proceedings of the IEEE 14th International Conference on High Performance Switching and Routing, 2013

Dynamically configurable online statistical flow feature extractor on FPGA.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2013

High throughput energy efficient parallel FFT architecture on FPGAs.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2013

100+ Gbps IPv6 packet forwarding on multi-core platforms.
Proceedings of the 2013 IEEE Global Communications Conference, 2013

Fast dynamically updatable packet classifier on FPGA.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Energy efficient architecture for matrix multiplication on FPGAs.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A high-performance IPV6 lookup engine on FPGA.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Energy efficient parameterized FFT architecture.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

High throughput and programmable online trafficclassifier on FPGA.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Scalable high-throughput architecture for large balanced tree structures on FPGA (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

AutoMapper: an automated tool for optimal hardware resource allocation for networking applications on FPGA (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Towards hybrid online on-demand querying of realtime data with stateful complex event processing.
Proceedings of the 2013 IEEE International Conference on Big Data, 2013

Enriching employee ontology for enterprises with knowledge discovery from social networks.
Proceedings of the Advances in Social Networks Analysis and Mining 2013, 2013

The role of organization hierarchy in technology adoption at the workplace.
Proceedings of the Advances in Social Networks Analysis and Mining 2013, 2013

Algorithm Design Methodology for Embedded Architectures.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

High-performance architecture for dynamically updatable packet classification on FPGA.
Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2013

2012
Large-Scale Regular Expression Matching on FPGA.
Proceedings of the Handbook of Finite State Based Models and Applications., 2012

Scalable Packet Classification on FPGA.
IEEE Trans. VLSI Syst., 2012

Distributed Evidence Propagation in Junction Trees on Clusters.
IEEE Trans. Parallel Distrib. Syst., 2012

High-Performance and Compact Architecture for Regular Expression Matching on FPGA.
IEEE Trans. Computers, 2012

Scalable Tree-Based Architectures for IPv4/v6 Lookup Using Prefix Partitioning.
IEEE Trans. Computers, 2012

Learning to Rank Complex Semantic Relationships.
Int. J. Semantic Web Inf. Syst., 2012

Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10).
Int. J. Reconfig. Comp., 2012

Understanding web images by object relation network.
Proceedings of the 21st World Wide Web Conference 2012, 2012

Predict Whom One Will Follow: Followee Recommendation in Microblogs.
Proceedings of the 2012 International Conference on Social Informatics (SocialInformatics), 2012

Predicting Communication Intention in Social Networks.
Proceedings of the 2012 International Conference on Privacy, 2012

Incorporating Semantic Knowledge into Dynamic Data Processing for Smart Power Grids.
Proceedings of the Semantic Web - ISWC 2012, 2012

Parallel Exact Inference on Multicore Using MapReduce.
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

A memory efficient IPv6 lookup engine on FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Power-efficient and scalable virtual router architecture on FPGA.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Semantic Information Modeling for Emerging Applications in Smart Grid.
Proceedings of the Ninth International Conference on Information Technology: New Generations, 2012

Rankbox: An adaptive ranking system for mining complex semantic relationships using user feedback.
Proceedings of the IEEE 13th International Conference on Information Reuse & Integration, 2012

Task Parallel Implementation of Belief Propagation in Factor Graphs.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

FPGA-based Router Virtualization: A Power Perspective.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

On Presenting Apropos Provenance for Situation Awareness and Data Forensics.
Proceedings of the Provenance and Annotation of Data and Processes, 2012

Hierarchical hybrid search structure for high performance packet classification.
Proceedings of the IEEE INFOCOM 2012, Orlando, FL, USA, March 25-30, 2012, 2012

Large-scale multi-flow regular expression matching on FPGA.
Proceedings of the 13th IEEE International Conference on High Performance Switching and Routing, 2012

StrideBV: Single chip 400G+ packet classification.
Proceedings of the 13th IEEE International Conference on High Performance Switching and Routing, 2012

Optimizing packet lookup in time and space on FPGA.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Scalable architecture for 135 GBPS IPv6 lookup on FPGA (abstract only).
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

Radiation Awareness in Three-Dimensional Wireless Sensor Networks.
Proceedings of the IEEE 8th International Conference on Distributed Computing in Sensor Systems, 2012

Semantic Image Clustering Using Object Relation Network.
Proceedings of the Computational Visual Media - First International Conference, 2012

Enterprise Wisdom Captured Socially.
Proceedings of the International Conference on Advances in Social Networks Analysis and Mining, 2012

Microblogging in the Enterprise: A Few Comments are in Order.
Proceedings of the International Conference on Advances in Social Networks Analysis and Mining, 2012

Cryptonite: A Secure and Performant Data Repository on Public Clouds.
Proceedings of the 2012 IEEE Fifth International Conference on Cloud Computing, 2012

2011
High-Level Application Development for Sensor Networks: Data-Driven Approach.
Proceedings of the Theoretical Aspects of Distributed Computing in Sensor Networks, 2011

Parallel evidence propagation on multicore processors.
The Journal of Supercomputing, 2011

Querying Provenance Information in Distributed Environments.
I. J. Comput. Appl., 2011

A Semantic-Based Approach for Handling Incomplete and Inaccurate Provenance in Reservoir Engineering.
Int. J. Semantic Computing, 2011

Bidirectional Pipelining for Scalable IP Lookup and Packet Classification
CoRR, 2011

Social Networking Analysis: A State of the Art and the Effect of Semantics.
Proceedings of the PASSAT/SocialCom 2011, Privacy, 2011

NSF/IEEE-TCPP curriculum initiative on parallel and distributed computing: core topics for undergraduates.
Proceedings of the 42nd ACM technical symposium on Computer science education, 2011

Toward data-driven demand-response optimization in a campus microgrid.
Proceedings of the BuildSys 2011, 2011

Predicting Missing Provenance Using Semantic Associations in Reservoir Engineering.
Proceedings of the 5th IEEE International Conference on Semantic Computing (ICSC 2011), 2011

Data Parallelism for Belief Propagation in Factor Graphs.
Proceedings of the 23rd International Symposium on Computer Architecture and High Performance Computing, 2011

Multi-stream Regular Expression Matching on FPGA.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Optimizing Decomposition-Based Packet Classification Implementation on FPGAs.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Self-Adaptive Evidence Propagation on Manycore Processors.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Exploring Weak Dependencies in DAG Scheduling.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Space-time tradeoff in regular expression matching with semi-deterministic finite automata.
Proceedings of the INFOCOM 2011. 30th IEEE International Conference on Computer Communications, 2011

FEACAN: Front-end acceleration for content-aware network processing.
Proceedings of the INFOCOM 2011. 30th IEEE International Conference on Computer Communications, 2011

Improving Energy Use Forecast for Campus Micro-grids Using Indirect Indicators.
Proceedings of the Data Mining Workshops (ICDMW), 2011

Multiroot: Towards Memory-Efficient Router Virtualization.
Proceedings of IEEE International Conference on Communications, 2011

Towards On-the-Fly Incremental Updates for Virtualized Routers on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Clustered Hierarchical Search Structure for Large-Scale Packet Classification on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Memory-efficient and scalable virtual routers using FPGA.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined Search.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Memory-Efficient IPv4/v6 Lookup on FPGAs Using Distance-Bounded Path Compression.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Towards an inexact semantic complex event processing framework.
Proceedings of the Fifth ACM International Conference on Distributed Event-Based Systems, 2011

Towards Reliable, Performant Workflows for Streaming-Applications on Cloud Platforms.
Proceedings of the 11th IEEE/ACM International Symposium on Cluster, 2011

Architectures for Green routers.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

Hybrid data structure for IP lookup in virtual routers using FPGAs.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

Optimizing Regular Expression Matching with SR-NFA on Multi-Core Systems.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

An Analysis of Security and Privacy Issues in Smart Grid Software Architectures on Clouds.
Proceedings of the IEEE International Conference on Cloud Computing, 2011

2010
Scalable Node-Level Computation Kernels for Parallel Exact Inference.
IEEE Trans. Computers, 2010

Energy-Efficient Task Mapping for Data-Driven Sensor Network Macroprogramming.
IEEE Trans. Computers, 2010

Parallel exact inference on the Cell Broadband Engine processor.
J. Parallel Distrib. Comput., 2010

Selected Papers from ReconFig 2009 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2009).
Int. J. Reconfig. Comp., 2010

Integrating Provenance Information in Reservoir Engineering.
Proceedings of the 2010 IEEE/WIC/ACM International Conference on Web Intelligence, 2010

Distributed Evidence Propagation in Junction Trees.
Proceedings of the 22st International Symposium on Computer Architecture and High Performance Computing, 2010

Hierarchical Scheduling of DAG Structured Computations on Manycore Processors with Dynamic Thread Grouping.
Proceedings of the Job Scheduling Strategies for Parallel Processing, 2010

Applying Semantic Web Techniques to Reservoir Engineering: Challenges and Experiences from Event Modeling.
Proceedings of the Seventh International Conference on Information Technology: New Generations, 2010

Provenance Collection in Reservoir Management Workflow Environments.
Proceedings of the Seventh International Conference on Information Technology: New Generations, 2010

Workflow management of simulation based computation processes in transportation domain.
Proceedings of the IEEE International Conference on Information Reuse and Integration, 2010

Head-body partitioned string matching for Deep Packet Inspection with scalable and attack-resilient performance.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Message from steering co-chairs.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Scalable multi-pipeline architecture for high performance multi-pattern string matching.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

FRuG: A benchmark for packet forwarding in future networks.
Proceedings of the 29th International Performance Computing and Communications Conference, 2010

High Performance Dictionary-Based String Matching for Deep Packet Inspection.
Proceedings of the INFOCOM 2010. 29th IEEE International Conference on Computer Communications, 2010

Parallel Exact Inference on a CPU-GPGPU Heterogenous System.
Proceedings of the 39th International Conference on Parallel Processing, 2010

Architecture-aware data structure optimization for green IP lookup.
Proceedings of the 11th IEEE International Conference on High Performance Switching and Routing, 2010

A message-passing multi-softcore architecture on FPGA for Breadth-first Search.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Multi-dimensional packet classification on FPGA: 100 Gbps and beyond.
Proceedings of the International Conference on Field-Programmable Technology, 2010

High-throughput IP-lookup supporting dynamic routing tables using FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Automation Framework for Large-Scale Regular Expression Matching on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

High throughput and large capacity pipelined dynamic search tree on FPGA.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Memory efficient string matching: a modular approach on FPGAs (abstract only).
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

A Memory-Efficient and Modular Approach for String Matching on FPGAs.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Collaborative scheduling of DAG structured computations on multicore processors.
Proceedings of the 7th Conference on Computing Frontiers, 2010

2009
Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines.
J. Parallel Distrib. Comput., 2009

Software Toolchain for Large-Scale RE-NFA Construction on FPGA.
Int. J. Reconfig. Comp., 2009

Field-split parallel architecture for high performance multi-match packet classification using FPGAs.
Proceedings of the SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2009

Parallel Evidence Propagation on Multicore Processors.
Proceedings of the Parallel Computing Technologies, 10th International Conference, 2009

Hierarchical Dependency Graphs: Abstraction and Methodology for Mapping Systolic Array Designs to Multicore Processors.
Proceedings of the Parallel Computing Technologies, 10th International Conference, 2009

Transitive closure on the cell broadband engine: A study on self-scheduling in a multicore processor.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Reducing dynamic power dissipation in pipelined forwarding engines.
Proceedings of the 27th International Conference on Computer Design, 2009

Scalable Packet Classification: Cutting or Merging?
Proceedings of the 18th International Conference on Computer Communications and Networks, 2009

Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

Large-scale wire-speed packet classification on FPGAs.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Memory-Efficient Pipelined Architecture for Large-Scale String Matching.
Proceedings of the FCCM 2009, 2009

Multi-Core Architecture on FPGA for Large Dictionary String Matching.
Proceedings of the FCCM 2009, 2009

Scalable High Throughput and Power Efficient IP-Lookup on FPGA.
Proceedings of the FCCM 2009, 2009

Algorithm Design for Reconfigurable Computing Systems.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification.
Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009

2008
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores.
IEEE Trans. VLSI Syst., 2008

A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft Processors.
IEEE Trans. VLSI Syst., 2008

Data Gathering with Tunable Compression in Sensor Networks.
IEEE Trans. Parallel Distrib. Syst., 2008

Accelerating Molecular Dynamics Simulations with Reconfigurable Computers.
IEEE Trans. Parallel Distrib. Syst., 2008

Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems.
IEEE Trans. Computers, 2008

High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware.
IEEE Trans. Computers, 2008

A pipelined-loop-compatible architecture and algorithm to reduce variable-length sets of floating-point data on a reconfigurable computer.
J. Parallel Distrib. Comput., 2008

Parallel exact inference on the cell broadband engine processor.
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2008

Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Detecting Dirty Queries during Iterative Development of OWL Based Applications.
Proceedings of the On the Move to Meaningful Internet Systems: OTM 2008, 2008

Towards an integrated modeling and simulation framework for freight transportation in metropolitan areas.
Proceedings of the IEEE International Conference on Information Reuse and Integration, 2008

Data component based management of reservoir simulation models.
Proceedings of the IEEE International Conference on Information Reuse and Integration, 2008

Workflow instance detection: Toward a knowledge capture methodology for smart oilfields.
Proceedings of the IEEE International Conference on Information Reuse and Integration, 2008

Junction tree decomposition for parallel exact inference.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Parallel IP lookup using multiple SRAM-based pipelines.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

DOSA: design optimizer for scientific applications.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Towards Green Routers: Depth-Bounded Multi-Pipeline Architecture for Power-Efficient IP Lookup.
Proceedings of the 2008 IEEE International Performance, 2008

Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup.
Proceedings of the INFOCOM 2008. 27th IEEE International Conference on Computer Communications, 2008

Parallel Inferencing for OWL Knowledge Bases.
Proceedings of the 2008 International Conference on Parallel Processing, 2008

Multi-Way Pipelining for Power-Efficient IP Lookup.
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA.
Proceedings of the FPL 2008, 2008

Matrix Computations on Heterogeneous Reconfigurable Systems.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

A SRAM-based Architecture for Trie-based IP Lookup Using FPGA.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Energy-Efficient Task Mapping for Data-Driven Sensor Network Macroprogramming.
Proceedings of the Distributed Computing in Sensor Systems, 2008

Multi-terabit ip lookup using parallel bidirectional pipelines.
Proceedings of the 5th Conference on Computing Frontiers, 2008

Compact architecture for high-throughput regular expression matching on FPGA.
Proceedings of the 2008 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2008

A Data Partitioning Approach for Parallelizing Rule Based Inferencing for Materialized OWL Knowledge Bases.
Proceedings of the ISCA 21st International Conference on Parallel and Distributed Computing and Communication Systems, 2008

Architecture-Independent Programming for Wireless Sensor Networks.
Wiley, ISBN: 978-0-471-77889-9, 2008

2007
A Hierarchical Performance Model for Reconfigurable Computers.
Proceedings of the Handbook of Parallel Computing - Models, Algorithms and Applications., 2007

Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems.
IEEE Trans. Parallel Distrib. Syst., 2007

High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs.
IEEE Trans. Parallel Distrib. Syst., 2007

Adaptive Allocation of Independent Tasks to Maximize Throughput.
IEEE Trans. Parallel Distrib. Syst., 2007

A model-based extensible framework for efficient application design using FPGA.
ACM Trans. Design Autom. Electr. Syst., 2007

Fault-tolerant analysis for multiple servers movie retrieval strategy for distributed multimedia applications.
Multimedia Tools Appl., 2007

A window-assisted video partitioning strategy for partitioning and caching video streams in distributed multimedia systems.
J. Parallel Distrib. Comput., 2007

Sparse Matrix Computations on Reconfigurable Hardware.
IEEE Computer, 2007

Node Level Primitives for Parallel Exact Inference.
Proceedings of the 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 2007

Expressing Sensor Network Interaction Patterns Using Data-Driven Macroprogramming.
Proceedings of the Fifth Annual IEEE International Conference on Pervasive Computing and Communications, 2007

Optimizing Matrix Multiplication on Heterogeneous Reconfigurable Systems.
Proceedings of the Parallel Computing: Architectures, 2007

Parallel Exact Inference.
Proceedings of the Parallel Computing: Architectures, 2007

Enabling Scope-Based Interactions in Sensor Network Macroprogramming.
Proceedings of the IEEE 4th International Conference on Mobile Adhoc and Sensor Systems, 2007

ModelML: a Markup Language for Automatic Model Synthesis.
Proceedings of the IEEE International Conference on Information Reuse and Integration, 2007

Hardware/Software Co-Design for Matrix Computations on Reconfigurable Computing Systems.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

DOSA: Design Optimizer for Scientific Applications.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup.
Proceedings of the 15th Annual IEEE Symposium on High-Performance Interconnects, 2007

Scientific Computing using Reconfigurable Hardware.
Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2007

A Compilation Framework for Macroprogramming Networked Sensors.
Proceedings of the Distributed Computing in Sensor Systems, 2007

A Semantic Framework for Integrated Asset Management in Smart Oilfields.
Proceedings of the Seventh IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2007), 2007

An Architecture of a Workflow System for Integrated Asset Management in the Smart Oil Field Domain.
Proceedings of the 2007 IEEE International Conference on Services Computing, 2007

2006
Energy Minimization for Real-Time Data Gathering in Wireless Sensor Networks.
IEEE Trans. Wireless Communications, 2006

Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms.
ACM Trans. Embedded Comput. Syst., 2006

Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs.
IEEE Trans. Dependable Sec. Comput., 2006

Editors' Note.
IEEE Trans. Computers, 2006

Introducting the New Editor-in-Chief of the IEEE Transactions on Computers.
IEEE Trans. Computers, 2006

Editor's Note.
IEEE Trans. Computers, 2006

Maximum lifetime data sensing and extraction in energy constrained networked sensor systems.
J. Parallel Distrib. Comput., 2006

Cache-Friendly implementations of transitive closure.
ACM Journal of Experimental Algorithmics, 2006

A flexible multi-dimensional QoS performance measure framework for distributed heterogeneous systems.
Cluster Computing, 2006

Molecular dynamics - Preliminary investigation of advanced electrostatics in molecular dynamics on reconfigurable computers.
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006

Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference.
Proceedings of the 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 2006

Towards a model-based application integration framework for smart oilfields.
Proceedings of the 2006 IEEE International Conference on Information Reuse and Integration, 2006

Accelerating DTI tractography using FPGAs.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Performance of FPGA implementation of bit-split architecture for intrusion detection systems.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Issues in designing a compilation framework for macroprogrammed networked sensor systems.
Proceedings of the First International Conference in Integrated Internet Ad Hoc and Sensor Networks, 2006

A Model-Based Framework for Developing and Deploying Data Aggregation Services.
Proceedings of the Service-Oriented Computing, 2006

Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems.
Proceedings of the 12th International Conference on Parallel and Distributed Systems, 2006

Energy-Efficient and Fault-Tolerant Resolution of Topographic Queries in Networked Sensor Systems.
Proceedings of the 12th International Conference on Parallel and Distributed Systems, 2006

Scalable Parallel Implementation of Exact Inference in Bayesian Networks.
Proceedings of the 12th International Conference on Parallel and Distributed Systems, 2006

High-Performance and Parameterized Matrix Factorization on FPGAs.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Regular Expression Software Deceleration for Intrusion Detection Systems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

A Performance model for accelerating scientific applications on reconfigurable computers.
Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Efficient FPGA-based Implementations of the MIMO-OFDM Physical Layer.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

An FPGA-Based Application-Specific Processor for Efficient Reduction of Multiple Variable-Length Floating-Point Data Sets.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

Information Processing and Routing in Wireless Sensor Networks.
World Scientific, ISBN: 978-981-270-146-6, 2006

2005
Cross-Layer Optimization for Energy-Efficient Information Processing and Routing.
Proceedings of the Handbook of Algorithms for Wireless Networking and Mobile Computing., 2005

Distributed Collaborative Computation in Wireless Sensor Systems.
Proceedings of the Handbook of Algorithms for Wireless Networking and Mobile Computing., 2005

Energy- and time-efficient matrix multiplication on FPGAs.
IEEE Trans. VLSI Syst., 2005

Configuration compression for FPGA-based embedded systems.
IEEE Trans. VLSI Syst., 2005

A computationally efficient engine for flexible intrusion detection.
IEEE Trans. VLSI Syst., 2005

Energy-Efficient Computations on FPGAs.
The Journal of Supercomputing, 2005

Editor's Note.
IEEE Trans. Computers, 2005

Editor's Note.
IEEE Trans. Computers, 2005

On communication models for algorithm design in networked sensor systems: A case study, .
Pervasive and Mobile Computing, 2005

Energy-Balanced Task Allocation for Collaborative Processing in Wireless Sensor Networks.
MONET, 2005

MIP formulation for robust resource allocation in dynamic real-time systems.
Journal of Systems and Software, 2005

Arithmetic-Level Instruction Based Energy Estimation for FPGA based Soft Processors.
J. Low Power Electronics, 2005

Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs.
IJES, 2005

Maximum Data Gathering in Networked Sensor Systems.
IJDSN, 2005

High Performance Linear Algebra Operations on Reconfigurable Systems.
Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, 2005

High-Performance and Area-Efficient Reduction Circuits on FPGAs.
Proceedings of the 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 2005

Supporting Topographic Queries in a Class of Networked Sensor Systems.
Proceedings of the 3rd IEEE Conference on Pervasive Computing and Communications Workshops (PerCom 2005 Workshops), 2005

Programming Paradigms for Networked Sensing: A Distributed Systems' Perspective.
Proceedings of the Distributed Computing, 2005

An FPGA-Based Floating-Point Jacobi Iterative Solver.
Proceedings of the 8th International Symposium on Parallel Architectures, 2005

Modeling methodology for application development in petroleum industry.
Proceedings of the 2005 IEEE International Conference on Information Reuse and Integration, 2005

Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Communication Models for Algorithm Design in Networked Sensor Systems.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Design Tradeoffs for BLAS Operations on Reconfigurable Hardware.
Proceedings of the 34th International Conference on Parallel Processing (ICPP 2005), 2005

Time and energy efficient Viterbi decoding using FPGAs.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

Sparse Matrix-Vector multiplication on FPGAs.
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

COMA: A COoperative MAnagement Scheme for Energy Efficient Implementation of Real-Time Operating Systems on FPGA Based Soft Processors.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

High-Performance FPGA-Based General Reduction Methods.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Area-Efficient Evaluation of a Class of Arithmetic Expressions Using Deeply Pipelined Floating-Point Cores.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

A Library of Parameterizable Floating-Point Cores for FPGAs and Their Application to Scientific Computing.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

High Performance Computing using Reconfigurable Hardware.
Proceedings of the Sixth Mexican International Conference on Computer Science (ENC 2005), 2005

System-level Support for Macroprogramming of Networked Sensing Applications.
Proceedings of the 2005 International Conference on Pervasive Systems and Computing, 2005

High-throughput linked-pattern matching for intrusion detection systems.
Proceedings of the 2005 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2005

2004
Dynamic data layouts for cache-conscious implementation of a class of signal transforms.
IEEE Trans. Signal Processing, 2004

Optimizing Graph Algorithms for Improved Cache Performance.
IEEE Trans. Parallel Distrib. Syst., 2004

An adaptive cryptographic engine for internet protocol security architectures.
ACM Trans. Design Autom. Electr. Syst., 2004

Issues in Designing Middleware for Wireless Sensor Networks.
IEEE Network, 2004

A Hierarchical Model For Distributed Collaborative Computation In Wireless Sensor Networks.
Int. J. Found. Comput. Sci., 2004

Rapid energy estimation of computations on FPGA based soft processors.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Power aware coding for spatio-temporally correlated wireless sensor data.
Proceedings of the 2004 IEEE International Conference on Mobile Ad-hoc and Sensor Systems, 2004

Optimizing a class of in-network processing applications in networked sensor systems.
Proceedings of the 2004 IEEE International Conference on Mobile Ad-hoc and Sensor Systems, 2004

Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on FPGAs.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Distributed Adaptive Task Allocation in Heterogeneous Computing Environments to Maximize Throughput.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Analysis of High-Performance Floating-Point Arithmetic on FPGAs.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Iterative Integer Programming Formuation for Robust Resource Allocation in Dynamic Real-Time Systems.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Energy-Latency Tradeoffs for Data Gathering in Wireless Sensor Networks.
Proceedings of the Proceedings IEEE INFOCOM 2004, 2004

Algorithm Design and Synthesis for Wireless Sensor Networks.
Proceedings of the 33rd International Conference on Parallel Processing (ICPP 2004), 2004

Energy-Efficient Communication in Multi-Channel Single-Hop Sensor Networks.
Proceedings of the 10th International Conference on Parallel and Distributed Systems, 2004

Parameterized and energy efficient adaptive beamforming on FPGAs using MATLAB/Simulink.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms.
Proceedings of the Field Programmable Logic and Application, 2004

A Framework for Energy Efficient Design of Multi-rate Applications Using Hybrid Reconfigurable Systems.
Proceedings of the Field Programmable Logic and Application, 2004

Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs.
Proceedings of the Field Programmable Logic and Application, 2004

Time and area efficient pattern matching on FPGAs.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

PyGen: A MATLAB/Simulink Based Tool for Synthesizing Parameterized and Energy Efficient Designs Using FPGAs.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

Duty Cycle Aware Application Design using FPGAs.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

Structured Communication in Single Hop Sensor Networks.
Proceedings of the Wireless Sensor Networks, First European Workshop, 2004

Energy Performance of Floating-Point Matrix Multiplication on FPGAs.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Invited Paper: Energy-Efficient Computations on FPGAs.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Efficient Floating-point Based Block LU Decomposition on FPGAs.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Performance Optimization of a De-centralized Task Allocation Protocol via Bandwidth and Buffer Management.
Proceedings of the 2nd International Workshop on Challenges of Large Applications in Distributed Environments, 2004

Algorithm Design and Optimization for Sensor Systems: (Invited Talk).
Proceedings of the Algorithmic Aspects of Wireless Sensor Networks: First International Workshop, 2004

Constrained Flow Optimization with Applications to Data Gathering in Sensor Networks.
Proceedings of the Algorithmic Aspects of Wireless Sensor Networks: First International Workshop, 2004

2003
Tiling, Block Data Layout, and Memory Hierarchy Performance.
IEEE Trans. Parallel Distrib. Syst., 2003

Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures.
The Journal of Supercomputing, 2003

Editor's Note.
IEEE Trans. Computers, 2003

Editor's Note.
IEEE Trans. Computers, 2003

Editor's Note.
IEEE Trans. Computers, 2003

Editor's Note.
IEEE Trans. Computers, 2003

Efficient collective communication in distributed heterogeneous systems.
J. Parallel Distrib. Comput., 2003

Resource Allocation for Independent Real-Time Tasks in Heterogeneous Systems for Energy Minimization.
J. Inf. Sci. Eng., 2003

Algorithmic Techniques for Memory Energy Reduction.
Proceedings of the Experimental and Efficient Algorithms, Second International Workshop, 2003

Combinatorial Techniques for Memory Power State Scheduling in Energy-Constrained Systems.
Proceedings of the Approximation and Online Algorithms, First International Workshop, 2003

Energy-Optimal and Energy-Balanced Sorting in a Single-Hop Wireless Sensor Network.
Proceedings of the First IEEE International Conference on Pervasive Computing and Communications (PerCom'03), 2003

Energy-balanced task allocation for collaborative processing in networked embedded systems.
Proceedings of the 2003 Conference on Languages, 2003

A Distributed Algorithm for Waking-up in Heterogeneous Sensor Networks.
Proceedings of the Information Processing in Sensor Networks, 2003

A Hierarchical Model for Distributed Collaborative Computation in Wireless Sensor Networks.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

MIP Formulation for Robust Resource Allocation in Dynamic Real-Time Systems.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Collaborative and Distributed Computation in Mesh-Like Wireless Sensor Arrays.
Proceedings of the Personal Wireless Communications, IFIP-TC6 8th International Conference, 2003

Bandwidth-Aware Resource Allocation for Heterogeneous Computing Systems to Maximize Throughput.
Proceedings of the 32nd International Conference on Parallel Processing (ICPP 2003), 2003

An energy efficient adaptive distributed source coding scheme in wireless sensor networks.
Proceedings of IEEE International Conference on Communications, 2003

Energy-efficient and parameterized designs for fast Fourier transform on FPGAs.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

Energy-balanced multi-hop packet transmission in wireless sensor networks.
Proceedings of the Global Telecommunications Conference, 2003

An Algorithm Designer's Workbench for Platform FPGA's.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Time and Energy Efficient Matrix Factorization Using FPGAs.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Energy-efficient signal processing using FPGAs.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

Energy-Efficient Discrete Cosine Transform on FPGAs.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

A hierarchical approach for energy efficient application design using heterogeneous embedded systems.
Proceedings of the International Conference on Compilers, 2003

2002
Run-time performance optimization of an FPGA-based deduction engine for SAT solvers.
ACM Trans. Design Autom. Electr. Syst., 2002

An Efficient Algorithm for Out-of-Core Matrix Transposition.
IEEE Trans. Computers, 2002

Utilization-Based Techniques for Statically Mapping Heterogeneous Applications onto the HiPer-D Heterogeneous Computing System.
Scalable Computing: Practice and Experience, 2002

Portable and Scalable Algorithm for Irregular All-to-All Communication.
J. Parallel Distrib. Comput., 2002

Greedy Heuristics for Resource Allocation in Dynamic Distributed Real-Time Heterogeneous Computing Systems.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulation.
Proceedings of the 2002 Joint Conference on Languages, 2002

Energy Efficient Adaptation of Multicast Protocols in Power Controlled Wireless Ad Hoc Networks.
Proceedings of the International Symposium on Parallel Architectures, 2002

Optimizing Graph Algorithms for Improved Cache Performance.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

A Metric and Mixed-Integer-Programming-Based Approach for Resource Allocation in Dynamic Real-Time Systems.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Utilization-Based Heuristics for Statically Mapping Real-Time Applications onto the HiPer-D Heterogeneous Computing System.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Analysis of Memory Hierarchy Performance of Block Data Layout.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002

Power-Aware Resource Allocation for Independent Tasks in Heterogeneous Real-Time Systems.
Proceedings of the 9th International Conference on Parallel and Distributed Systems, 2002

Adaptive Matrix Multiplication in Heterogeneous Environments.
Proceedings of the 9th International Conference on Parallel and Distributed Systems, 2002

Energy efficiency of FPGAs and programmable processors for matrix multiplication.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Area and time efficient implementations of matrix multiplication on FPGAs.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Efficient Metacomputation Using Self-Reconfiguration.
Proceedings of the Field-Programmable Logic and Applications, 2002

Energy-Efficient Matrix Multiplication on FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002

Performance Modeling and Interpretive Simulation of PIM Architectures and Applications (Research Note).
Proceedings of the Euro-Par 2002, 2002

Towards automatic synthesis of a class of application-specific sensor networks.
Proceedings of the International Conference on Compilers, 2002

A Model-Based Methodology for Application Specific Energy Efficient Data Path Design Using FPGAs.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

2001
Parallel Implementation of a Class of Adaptive Signal Processing Applications.
Algorithmica, 2001

MILAN: A Model Based Integrated Simulation Framework for Desgin of Embedded Suystems.
Proceedings of The Workshop on Languages, 2001

Collective Value of QoS: A Performance Measure Framework for Distributed Heterogeneous Networks.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

An integer programming approach for static mapping onto heterogeneous real-time systems.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

Run-Time Adaptation for Grid Environments.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

Cache conscious Walsh-Hadamard transform.
Proceedings of the IEEE International Conference on Acoustics, 2001

Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers.
Proceedings of the Field-Programmable Logic and Applications, 2001

Configuration compression for FPGA-based embedded systems.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001

Fast Regular Expression Matching Using FPGAs.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Cache-Friendly Implementations of Transitive Closure.
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001

2000
Block-cyclic redistribution over heterogeneous networks.
Cluster Computing, 2000

A QoS performance measure framework for distributed heterogeneous networks.
Proceedings of the Eight Euromicro Workshop on Parallel and Distributed Processing, 2000

Heterogeneous Computing Workshop (HCW 2000).
Proceedings of the Parallel and Distributed Processing, 2000

Dynamic Data Layouts for Cache-Conscious Factorization of DFT.
Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000

Configurable Architectures Workshop (RAW 2000).
Proceedings of the Parallel and Distributed Processing, 2000

Performance of On-Chip Multiprocessors for Vision Tasks.
Proceedings of the Parallel and Distributed Processing, 2000

Loop Pipelining and Optimization for Run Time Reconfiguration.
Proceedings of the Parallel and Distributed Processing, 2000

An Efficient Algorithm for Large-Scale Matrix Transposition.
Proceedings of the 2000 International Conference on Parallel Processing, 2000

A Framework for Mapping with Resource Co-Allocation in Heterogeneous Computing Systems.
Proceedings of the 9th Heterogeneous Computing Workshop, 2000

A Self-Reconfigurable Gate Array Architecture.
Proceedings of the Field-Programmable Logic and Applications, 2000

An Adaptive Cryptographic Engine for IPSec Architectures.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

A Comparative Study of Performance of AES Final Candidates Using FPGAs.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2000

1999
Efficient Algorithms for Block-Cyclic Array Redistribution Between Processor Sets.
IEEE Trans. Parallel Distrib. Syst., 1999

Adaptive Communication Algorithms for Distributed Heterogeneous Systems.
J. Parallel Distrib. Comput., 1999

Efficient Algorithms for Block-Cyclic Redistribution of Arrays.
Algorithmica, 1999

Hardware Object Selection for Mapping Loops onto Reconfigurable Architectures.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

Domain Specific Mapping for Solving Graph Problems on Reconfigurable Devices.
Proceedings of the Parallel and Distributed Processing, 1999

Efficient Collective Communication in Distributed Heterogeneous Systems.
Proceedings of the 19th International Conference on Distributed Computing Systems, Austin, TX, USA, May 31, 1999


A Unified Resource Scheduling Framework for Heterogeneous Computing Environments.
Proceedings of the 8th Heterogeneous Computing Workshop, 1999

Genetic Programming Using Self-Reconfigurable FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

String Natching on Nulticontext FPGAs Using Self-Reconfiguration.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

Dynamic Precision Management for Loop Computations on Reconfigurable Architectures.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998
Synthesis of area-efficient and high-throughput rate data format converters.
IEEE Trans. VLSI Syst., 1998

Parallelizing Image Feature Extraction on Coarse-Grain Machines.
IEEE Trans. Pattern Anal. Mach. Intell., 1998

Parallel Algorithms for Perceptual Grouping on Distributed Memory Machines.
J. Parallel Distrib. Comput., 1998

Efficient Algorithms for Block-Cyclic Array Redistribution between Processor Sets.
Proceedings of the ACM/IEEE Conference on Supercomputing, 1998

Portable Implementation of Real-Time Signal Processing Benchmarks on HPC Platforms.
Proceedings of the Applied Parallel Computing, 1998

A Mapping Methodology for Designing Software Task Pipelines for Embedded Signal Processing.
IPPS/SPDP Workshops, 1998

Adaptive Communication Algorithms for Distributed Heterogeneous Systems.
Proceedings of the Seventh IEEE International Symposium on High Performance Distributed Computing, 1998

Space-efficient Mapping of 2D-DCT onto Dynamically Configurable Coarse-Grained Architectures.
Proceedings of the Field-Programmable Logic and Applications, 1998

Mapping Loops onto Reconfigurable Architectures.
Proceedings of the Field-Programmable Logic and Applications, 1998

Mapping Homogeneous Computations onto Dynamically Configurable Coarse-Grained Architectures.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997
An Optimal Multiplication Algorithm on Reconfigurable Mesh.
IEEE Trans. Parallel Distrib. Syst., 1997

Constant Time Algorithms for Computational Geometry on the Reconfigurable Mesh.
IEEE Trans. Parallel Distrib. Syst., 1997

Seeking Solutions in Configurable Computing.
IEEE Computer, 1997

Efficient Algorithms for Multi-dimensional Block-Cyclic Redistribution of Arrays.
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

Configurable Hardware for Symbolic Search Operations.
Proceedings of the 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 1997

Fast parallel implementation of DFT using configurable devices.
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

1996
Efficient algorithms for block-cyclic redistribution of arrays.
Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996

Synthesis of VLSI architectures for tree-structured image coding.
Proceedings of the Proceedings 1996 International Conference on Image Processing, 1996

Portable Message Passing Algorithms for Irregular All-to-all Communication.
Proceedings of the 16th International Conference on Distributed Computing Systems, 1996

Load balancing strategies for symbolic vision computations.
Proceedings of the 3rd International Conference on High Performance Computing, 1996

Synthesis of memory-based VLSI architectures for discrete wavelet transforms.
Proceedings of the 8th European Signal Processing Conference, 1996

An Asynchronous Parallel Algorithm for Symbolic Grouping Operations in Vision.
Proceedings of the Euro-Par '96 Parallel Processing, 1996

1995
A Fast Algorithm for Computing a Histogram on Reconfigurable Mesh.
IEEE Trans. Pattern Anal. Mach. Intell., 1995

Bounds on the Diameter of One-Dimensional PEC Networks.
J. Parallel Distrib. Comput., 1995

An Optimal Sorting Algorithm on Reconfigurable Mesh.
J. Parallel Distrib. Comput., 1995

Issues in using heterogeneous HPC systems for embedded real time signal processing applications.
RTCSA, 1995

A fast and area-efficient VLSI architecture for embedded image coding.
Proceedings of the Proceedings 1995 International Conference on Image Processing, 1995

Synthesis of VLSI Architectures for Two-Dimensional Discrete Wavelet Transforms.
Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995

1994
Scalable Data Parallel Implementations of Object Recognition Using Geometric Hashing.
J. Parallel Distrib. Comput., 1994

Efficient Parallel Computation on the Reduced Mesh of Tress Organization.
J. Parallel Distrib. Comput., 1994

A Fast Algorithm for Performing Vector Quantization and its VLSI Implementation.
Proceedings of the Seventh International Conference on VLSI Design, 1994

Scalable parallel implementations of perceptual grouping on connection machine CM-5.
Proceedings of the 12th IAPR International Conference on Pattern Recognition, 1994

A General Framework for Synthesis of Data Format Converters.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

Scalable Data Parallel Implementations of Object Recognition on Connection Machine CM-.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

Synthesis of a class of data format converters with specified delays.
Proceedings of the International Conference on Application Specific Array Processors, 1994

1993
Modular VLSI architectures for computing the arithmetic Fourier transform.
IEEE Trans. Signal Processing, 1993

Latin Squares for Parallel Array Access.
IEEE Trans. Parallel Distrib. Syst., 1993

Modular VLSI architectures for real-time full-search-based vector quantization.
IEEE Trans. Circuits Syst. Video Techn., 1993

Parallel Computations on Reconfigurable Meshes.
IEEE Trans. Computers, 1993

Efficient VLSI Implementation of Iterative Solutions to Sparse Linear Systems.
Parallel Computing, 1993

An O(1) Time Optimal Algorithm for Multiplying Matrices on Reconfigurable Mesh.
Inf. Process. Lett., 1993

Heterogeneous Computing: Challenges and Opportunities.
IEEE Computer, 1993

Fast Arithmetic on Reconfigurable Meshes.
Proceedings of the 1993 International Conference on Parallel Processing, 1993

Scalable geometric hashing on MasPar machines.
Proceedings of the Conference on Computer Vision and Pattern Recognition, 1993

1992
Parallel implementation of neural networks.
VLSI Signal Processing, 1992

Parallel orientation of polygonal parts.
IEEE Trans. Robotics and Automation, 1992

Parallel Architectures and Algorithms for Image Component Labeling.
IEEE Trans. Pattern Anal. Mach. Intell., 1992

Perfect Latin Squares.
Discrete Applied Mathematics, 1992

A Tight Bound on the Diameter of One-Dimensional PEC Networks.
Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing, 1992

An Optimal Multiplication Algorithm for Reconfigurable Mesh.
Proceedings of the Fourth IEEE Symposium on Parallel and Distributed Processing, 1992

An Optimal Sorting Algorithm on Reconfigurable Mesh.
Proceedings of the 6th International Parallel Processing Symposium, 1992

Parallel Orientation of Polygonal Parts.
Proceedings of the 1992 International Conference on Parallel Processing, 1992

A Class of Optimal VLSI Architectures for Computing Discrete Fourier Transform.
Proceedings of the 1992 International Conference on Parallel Processing, 1992

Efficient Parallel Algorithms for Some Geometric Problems on Reconfigurable Mesh.
Proceedings of the 1992 International Conference on Parallel Processing, 1992

Optimal Multipass Self-Routing Algorithms for Clos-Type Multistage Networks.
Proceedings of the 1992 International Conference on Parallel Processing, 1992

1991
Algorithmic Mapping of Neural Network Models onto Parallel SIMD Machines.
IEEE Trans. Computers, 1991

On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication.
IEEE Trans. Computers, 1991

Optimal VLSI Sorting with Reduced Number of Processors.
IEEE Trans. Computers, 1991

Fast Image Labeling Using Local Operators on Mesh-Connected Computers.
IEEE Trans. Pattern Anal. Mach. Intell., 1991

Special Issue on Massively Parallel Computation.
J. Parallel Distrib. Comput., 1991

Optimal Geometric Algorithms for Digitized Images on Fixed-Size Linear Arrays and Scan-Line Arrays.
Distributed Computing, 1991

Orthogonal multiprocessor sharing memory with an enhanced mesh for integrated image understanding.
CVGIP: Image Understanding, 1991

Processor-Time Optimal Parallel Algorithms for Digitized Images on Mesh-Connected Processor Arrays.
Algorithmica, 1991

An Iterative Sparse Linear System Solver on Star Graphs.
Proceedings of the International Conference on Parallel Processing, 1991

Parallel algorithms and architectures for discrete relaxation technique.
Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1991

1990
Mapping dynamic programming onto a linear systolic array.
VLSI Signal Processing, 1990

A Note on the Linear Transformation Method for Systolic Array Design.
IEEE Trans. Computers, 1990

Efficient Histogramming on Hypercube SIMD Machines.
Computer Vision, Graphics, and Image Processing, 1990

Efficient parallel implementation of RETE pattern matching.
Comput. Syst. Sci. Eng., 1990

Parallel Convexity Algorithms for Digitized Images on a Linear Array of Processors.
Proceedings of the Algorithms, 1990

An Efficient Mapping of Directed Graph Based Computations onto SIMD Hypercube Arrays and Applications.
Proceedings of the 1990 International Conference on Parallel Processing, 1990

1989
On Mapping Algorithms to Linear and Fault-Tolerant Systolic Arrays.
IEEE Trans. Computers, 1989

An efficient VLSI architecture with applications to geometric problems.
Parallel Computing, 1989

Image Computations on Meshes with Multiple Broadcast.
IEEE Trans. Pattern Anal. Mach. Intell., 1989

Efficient Parallel Algorithms for Image Template Matching on Hypercube SIMD Machines.
IEEE Trans. Pattern Anal. Mach. Intell., 1989

Designing Linear Systolic Arrays.
J. Parallel Distrib. Comput., 1989

Perfect Latin Squares and Parallel Array Access.
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

Fast Image Labeling using Local Operators On Mesh-Connected Computers.
Proceedings of the International Conference on Parallel Processing, 1989

Parallel memory systems for image processing.
Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1989

Fine grain image computations on electro-optical arrays.
Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1989

1988
Reliability Analysis in Distributed Systems.
IEEE Trans. Computers, 1988

Data Movement Operations and Applications on Reconfigurable VLSI Arrays.
Proceedings of the International Conference on Parallel Processing, 1988

Mapping Two Dimensional Systolic Arrays to One Dimensional Arrays and Applications.
Proceedings of the International Conference on Parallel Processing, 1988

Image computations on reconfigurable VLSI arrays.
Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1988

Optimal geometric algorithms on fixed-size linear arrays and scan line arrays.
Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1988

1987
Array Processor with Multiple Broadcasting.
J. Parallel Distrib. Comput., 1987

An Efficient Fixed Size Array for Solving Large Scale Toeplitz Systems-Abstract.
Proceedings of the Third SIAM Conference on Parallel Processing for Scientific Computing, 1987

VLSI Arrays with Reconfigurable Buses.
Proceedings of the Supercomputing, 1987

Parallel Image Processing On Enhanced Arrays.
Proceedings of the International Conference on Parallel Processing, 1987

A General Purpose VLSI Array for Efficient Signal and Image Processsing.
Proceedings of the International Conference on Parallel Processing, 1987

Efficient Image Template Matching on Hypercube SIMD Arrays.
Proceedings of the International Conference on Parallel Processing, 1987

1986
Distributed Program Reliability Analysis.
IEEE Trans. Software Eng., 1986

Permutations on Illiac IV-Type Networks.
IEEE Trans. Computers, 1986

Parallel Geometric Algorithms for Digitized Pictures on Mesh of Trees.
Proceedings of the International Conference on Parallel Processing, 1986

Reliability Analysis in Distributed Systems.
Proceedings of the 6th International Conference on Distributed Computing Systems, 1986

1985
Array Processor with Multiple Broadcasting.
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985

A VLSI-Based Multiprocessor Architecture for Implementing Parallel Algorithms.
Proceedings of the International Conference on Parallel Processing, 1985

1984
Information Transfer under Different Sets of Protocols.
SIAM J. Comput., 1984

Information Transfer in Distributed Computing with Applications to VLSI.
J. ACM, 1984


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