Andreas Emeretlis

According to our database, Andreas Emeretlis authored at least 11 papers between 2014 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A Multi-stage Hybrid Approach for Mapping Applications on Heterogeneous Multi-core Platforms.

Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

2018

Static Mapping of Applications on Heterogeneous Multi-Core Platforms Combining Logic-Based Benders Decomposition with Integer Linear Programming.

Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros

ACM Trans. Design Autom. Electr. Syst., 2018

2017

Task graph mapping and scheduling on heterogeneous architectures under communication constraints.

Andreas Emeretlis, T. Tsakoulis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros

Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

2016

A Logic-Based Benders Decomposition Approach for Mapping Applications on Heterogeneous Multicore Platforms.

Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos S. Voros

ACM Trans. Embed. Comput. Syst., 2016

A hybrid approach for mapping and scheduling on heterogeneous multicore systems.

Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos S. Voros

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

2015

Mapping DAGs on Heterogeneous Platforms Using Logic-Based Benders Decompostion.

Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikos S. Voros

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

40 Gb/s FPGA implementation of a reduced complexity volterra DFE for DQPSK optical links.

Maki Nanou, Andreas Emeretlis, Christina Tanya Politi, George Theodoridis, Kristina Georgoulakis, George-Othon Glentis

Proceedings of the 17th International Conference on Transparent Optical Networks, 2015

FPGA implementation of a MIMO DFE IN 40 GB/S DQPSK optical links.

Andreas Emeretlis, V. Kefelouras, George Theodoridis, Maki Nanou, Christina Tanya Politi, Kristina Georgoulakis, George-Othon Glentis

Proceedings of the 23rd European Signal Processing Conference, 2015

2014

High-performance FPGA implementations of volterra DFEs for optical fiber systems.

Andreas Emeretlis, George Theodoridis, George-Othon Glentis

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

FPGA Implementations for Volterra DFEs.

Andreas Emeretlis, George Theodoridis

Proceedings of the 18th Panhellenic Conference on Informatics, 2014

A Hybrid ILP-CP Model for Mapping Directed Acyclic Task Graphs to Multicore Architectures.

Andreas Emeretlis, George Theodoridis, Panayiotis Alefragis, Nikolaos S. Voros

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014