Nikos S. Voros

According to our database1, Nikos S. Voros
  • authored at least 57 papers between 1998 and 2018.
  • has a "Dijkstra number"2 of four.

Timeline

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Bibliography

2018
Static Mapping of Applications on Heterogeneous Multi-Core Platforms Combining Logic-Based Benders Decomposition with Integer Linear Programming.
ACM Trans. Design Autom. Electr. Syst., 2018

2017
Profile-Driven Power Optimizations for AAL Robots: Maximizing Robots Idle Time by Offloading Monitoring Workload to Dedicated Hardware Components.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Cache Partitioning + Loop Tiling: A Methodology for Effective Shared Cache Management.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Door Detection Algorithm Development Based on Robotic Vision and Experimental Evaluation on Prominent Embedded Systems.
Proceedings of the Interactive Collaborative Robotics - Second International Conference, 2017

WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
A Logic-Based Benders Decomposition Approach for Mapping Applications on Heterogeneous Multicore Platforms.
ACM Trans. Embedded Comput. Syst., 2016

Resource efficient data compression algorithms for demanding, WSN based biomedical applications.
Journal of Biomedical Informatics, 2016

Scheduling independent tasks on heterogeneous processors using heuristics and Column Pricing.
Future Generation Comp. Syst., 2016

A hybrid approach for mapping and scheduling on heterogeneous multicore systems.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Designing the Next Generation of Home Automation Combining IoT and Robotic Technologies.
Proceedings of the 20th Pan-Hellenic Conference on Informatics, 2016

Computation and communication challenges to deploy robots in assisted living environments.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

EEG Feature Extraction Accelerator Enabling Long Term Epilepsy Monitoring Based on Ultra Low Power WSNs.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
Mapping DAGs on Heterogeneous Platforms Using Logic-Based Benders Decompostion.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

A Holistic Approach for Advancing Robots in Ambient Assisted Living Environments.
Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015

Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Perspective.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014
Introduction to the Special Issue on the 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'12).
TRETS, 2014

Advent: a system architecture for advanced monitoring of elders with chronic conditions.
Proceedings of the 7th International Conference on PErvasive Technologies Related to Assistive Environments, 2014

A framework for heterogeneous home monitoring WSN networks.
Proceedings of the 4th International Conference on Wireless Mobile Communication and Healthcare: "Transforming healthcare through innovations in mobile and wireless technologies", 2014

Experimental evaluation of bluetooth real time capabilities in communication intensive applications.
Proceedings of the 4th International Conference on Wireless Mobile Communication and Healthcare: "Transforming healthcare through innovations in mobile and wireless technologies", 2014

A Hybrid ILP-CP Model for Mapping Directed Acyclic Task Graphs to Multicore Architectures.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Profile-Guided Compilation of Scilab Algorithms for Multiprocessor Systems.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
MORPHEUS: A heterogeneous dynamically reconfigurable platform for designing highly complex embedded systems.
ACM Trans. Embedded Comput. Syst., 2013

Compiling Scilab to high performance embedded multicore systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2013

A high speed FPGA implementation of the 2D DCT for Ultra High Definition video coding.
Proceedings of the 18th International Conference on Digital Signal Processing, 2013

Coarse-Grain Optimization and Code Generation for Embedded Multicore Systems.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Coarse Grained Parallelism Optimization for Multicore Architectures: The ALMA Project Approach.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

Efficient Hardware Based Security Algorithm Implementation for WSN Medical Applications: The ARMOR Perspective.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2012
The effect of symmetric block ciphers on WSN performance and behavior.
Proceedings of the 8th IEEE International Conference on Wireless and Mobile Computing, 2012

From Scilab to multicore embedded systems: Algorithms and methodologies.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

A flexible approach for compiling scilab to reconfigurable multi-core embedded systems.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Mobile Multi-parametric Sensor System for Diagnosis of Epilepsy and Brain Related Disorders.
Proceedings of the Wireless Mobile Communication and Healthcare, 2012

From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

2011
The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform.
International Journal of Parallel Programming, 2011

Next Generation Smart Home Systems Using Hardware Acceleration Techniques.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Low Power FPGA Implementations of JH and Fugue Hash Functions.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010
System Level Design of Complex Hardware Applications Using ImpulseC.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

Design for Embedded Reconfigurable Systems Using MORPHEUS Platform.
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

System Level Design for Embedded Reconfigurable Systems Using MORPHEUS Platform.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009
Dynamic Data Type Optimization and Memory Assignment Methodologies.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

2008
System level design of telecom systems using formal model refinement: Applying the B method/language in practice.
Journal of Systems Architecture - Embedded Systems Design, 2008

2007
Implementation of Wireless Communications Systems on FPGA-Based Platforms.
EURASIP J. Emb. Sys., 2007

Prototyping of a WLAN system using C++ based architecture exploration.
Proceedings of the 3rd International Conference on Mobile Multimedia Communications, 2007

Applying formal methods for the design of wireless telecommunication systems.
Proceedings of the 3rd International Conference on Mobile Multimedia Communications, 2007

Data Structure Exploration of Dynamic Applications.
Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007), 2007

2006
System Level Architecture Exploration for Reconfigurable Systems On Chip.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
Heterogeneous system level co-simulation for the design of telecommunication systems.
Journal of Systems Architecture, 2005

2004
Embedded System Design Using Formal Model Refinement: An Approach Based on the Combined Use of UML and the B Language.
Design Autom. for Emb. Sys., 2004

An Electronic Voting Scheme with Physical Multiple Administrators and Identical Ballot Boxes.
Proceedings of the IADIS International Conference WWW/Internet 2004, 2004

A hardware/software codesign framework for developing complex embedded systems using formal model refinement.
Proceedings of the Forum on specification and Design Languages, 2004

A Heterogeneous Co-simulation Environment for Complex Embedded Telecommunication Systems.
Proceedings of the Forum on specification and Design Languages, 2004

2003
Hardware/Software Co-Design of Complex Embedded Systems: An Approach Using Efficient Process Models, Multiple Formalism Specification and Validation via Co-Simulation.
Design Autom. for Emb. Sys., 2003

2001
High-level co-simulation based on the extension of processor simulators.
Journal of Systems Architecture, 2001

2000
Efficient System Modeling for Complex Real-Time Industrial Networks using the ACCORD/UML Methodology.
Proceedings of the Architecture and Design of Distributed Embedded Systems, 2000

Specification, Implementation, and Validation of Object-Oriented Embedded Systems.
Proceedings of the Object-Oriented Technology, 2000

1998
Reusable Architecture Templates and Automatic Specification Mapping for the Efficient Implementation of ATM Protocols.
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998

Hardware - Software Co-design of embedded telecommunication systems using multiple formalisms for application development.
Proceedings of the Formal Description Techniques and Protocol Specification, 1998


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