Andrew W. Cross

Orcid: 0000-0001-9786-8196

Affiliations:
  • IBM Quantum Yorktown, Heights, NY, USA


According to our database1, Andrew W. Cross authored at least 25 papers between 2005 and 2024.

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Timeline

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Bibliography

2024
High-threshold and low-overhead fault-tolerant quantum memory.
Nat., 2024

2023
Non-Clifford and parallelizable fault-tolerant logical gates on constant and almost-constant rate homological quantum LDPC codes via higher symmetries.
CoRR, 2023

Defining Best Practices for Quantum Benchmarks.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

2022
Quantum Locally Testable Code with Exotic Parameters.
CoRR, 2022

Giallar: push-button verification for the qiskit Quantum compiler.
Proceedings of the PLDI '22: 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation, San Diego, CA, USA, June 13, 2022

2020
Synthesis of CNOT-Dihedral circuits with optimal number of two qubit gates.
Quantum, 2020

Resource-Efficient Quantum Computing by Breaking Abstractions.
Proc. IEEE, 2020

Challenges and Opportunities of Near-Term Quantum Computing Systems.
Proc. IEEE, 2020

Critical faults of leakage errors on the surface code.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2020

2019
Contract-based verification of a realistic quantum compiler.
CoRR, 2019

Quantum circuit compilers using gate commutation rules.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2016
Uniform Additivity in Classical and Quantum Information.
CoRR, 2016

2015
Leakage suppression in the toric code.
Quantum Inf. Comput., 2015

2014
On the geometry of stabilizer states.
Quantum Inf. Comput., 2014

2012
Efficient Inner-product Algorithm for Stabilizer States
CoRR, 2012

2011
Transversality Versus Universality for Additive Quantum Codes.
IEEE Trans. Inf. Theory, 2011

2009
Codeword Stabilized Quantum Codes.
IEEE Trans. Inf. Theory, 2009

A comparative code study for quantum fault tolerance.
Quantum Inf. Comput., 2009

2008
Fault-tolerant quantum computer architectures using hierarchies of quantum error-correcting codes.
PhD thesis, 2008

High-level interconnect model for the quantum logic array architecture.
ACM J. Emerg. Technol. Comput. Syst., 2008

2007
Design-space exploration of fault-tolerant building blocks for large-scale quantum computing.
Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007

2006
A flow-map model for analyzing pseudothresholds in fault-tolerant quantum computing.
Quantum Inf. Comput., 2006

A Layered Software Architecture for Quantum Computing Design Tools.
Computer, 2006

Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing.
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

2005
A Quantum Logic Array Microarchitecture: Scalable Quantum Data Movement and Computation.
Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005


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