Ang-Chih Hsieh

According to our database1, Ang-Chih Hsieh authored at least 9 papers between 2006 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2013
Utilizing circuit structure for scan chain diagnosis.
Proceedings of the 18th IEEE European Test Symposium, 2013

2012
Run-Time Reconfiguration of Expandable Cache for Embedded Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2012

TSV Redundancy: Architecture and Design Issues in 3-D IC.
IEEE Trans. Very Large Scale Integr. Syst., 2012

2011
Memory Mapping and Task Scheduling Techniques for Computation Models of Image Processing on Many-Core Platforms.
Proceedings of the International Conference on Parallel Processing, 2011

Enhanced Heterogeneous Code Cache management scheme for Dynamic Binary Translation.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
TSV redundancy: Architecture and design issues in 3D IC.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Thermal-aware memory mapping in 3D designs.
Proceedings of the Design, Automation and Test in Europe, 2009

2007
A functionality-directed clustering technique for low-power MTCMOS design - computation of simultaneously discharging current.
ACM Trans. Design Autom. Electr. Syst., 2007

2006
Instruction buffering for nested loops in low-power design.
IEEE Trans. Very Large Scale Integr. Syst., 2006


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