TingTing Hwang
According to our database1,
TingTing Hwang
authored at least 102 papers
between 1989 and 2023.
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Bibliography
2023
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2021
J. Inf. Sci. Eng., 2021
Comput. Electr. Eng., 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2019
A Novel Privacy-Preserving Deep Learning Scheme without Using Cryptography Component.
CoRR, 2019
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
2017
A Novel Cache-Utilization-Based Dynamic Voltage-Frequency Scaling Mechanism for Reliability Enhancements.
IEEE Trans. Very Large Scale Integr. Syst., 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Communication driven remapping of processing element (PE) in fault-tolerant NoC-based MPSoCs.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Thermal-aware dynamic page allocation policy by future access patterns for Hybrid Memory Cube (HMC).
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
A novel cache-utilization based dynamic voltage frequency scaling (DVFS) mechanism for reliability enhancements.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
ACM J. Emerg. Technol. Comput. Syst., 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Memory Mapping and Task Scheduling Techniques for Computation Models of Image Processing on Many-Core Platforms.
Proceedings of the International Conference on Parallel Processing, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Circuits Syst. II Express Briefs, 2010
A Physical-Location-Aware X-Filling Method for IR-Drop Reduction in At-Speed Scan Test.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Int. J. Bifurc. Chaos, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
ACM Trans. Design Autom. Electr. Syst., 2009
Leakage reduction, delay compensation using partition-based tunable body-biasing techniques.
ACM Trans. Design Autom. Electr. Syst., 2009
A physical-location-aware X-filling method for IR-drop reduction in at-speed scan test.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
ACM Trans. Design Autom. Electr. Syst., 2008
Int. J. Bifurc. Chaos, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
2007
A functionality-directed clustering technique for low-power MTCMOS design - computation of simultaneously discharging current.
ACM Trans. Design Autom. Electr. Syst., 2007
Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains.
J. Supercomput., 2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Performance-Driven Crosstalk Elimination at Postcompiler Level-The Case of Low-Crosstalk Op-Code Assignment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
A Bus-Encoding Scheme for Crosstalk Elimination in High-Performance Processor Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
ACM Trans. Design Autom. Electr. Syst., 2006
ACM Trans. Design Autom. Electr. Syst., 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the Languages and Compilers for High Performance Computing, 2004
Output-pattern directed decomposition for low power design.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
ACM Trans. Design Autom. Electr. Syst., 2003
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs.
Proceedings of the 2003 Design, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 2003 Design, 2003
2002
ACM Trans. Design Autom. Electr. Syst., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of ASP-DAC 2001, 2001
2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1998
J. Electron. Test., 1998
Proceedings of the 35th Conference on Design Automation, 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Net assignment for the FPGA-based logic emulation system in the folded-Clos network structure.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
ACM Trans. Design Autom. Electr. Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE J. Solid State Circuits, 1996
Proceedings of the 33st Conference on Design Automation, 1996
1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995
1994
VLSI Design, 1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
1993
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
Proceedings of the conference on European design automation, 1992
1990
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990
1989
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989