Anh Thien Tran

According to our database, Anh Thien Tran authored at least 7 papers between 2008 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Achieving High-Performance On-Chip Networks With Shared-Buffer Routers.

Anh Thien Tran, Bevan M. Baas

IEEE Trans. Very Large Scale Integr. Syst., 2014

2011

RoShaQ: High-performance on-chip router with shared queues.

Anh Thien Tran, Bevan M. Baas

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

2010

A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms.

Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

2009

A 167-Processor Computational Platform in 65 nm CMOS.

Dean Nguyen Truong, Wayne H. Cheng, Tinoosh Mohsenin, Zhiyi Yu, Anthony T. Jacobson, Gouri Landge, Michael J. Meeuwsen, Christine Watnik, Anh Thien Tran, Zhibin Xiao, Eric W. Work, Jeremy W. Webb, Paul Vincent Mejia, Bevan M. Baas

IEEE J. Solid State Circuits, 2009

A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network.

Anh Thien Tran, Dean Truong, Bevan M. Baas

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

A Low-cost High-speed Source-synchronous Interconnection Technique for GALS Chip Multiprocessors.

Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

A complete real-time 802.11a baseband receiver implemented on an array of programmable processors.

Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas

Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008