Anita Tino

According to our database1, Anita Tino authored at least 14 papers between 2010 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
SIMT-X: Extending Single-Instruction Multi-Threading to Out-of-Order Cores.
ACM Trans. Archit. Code Optim., 2020

2017
Increasing the efficiency and feasibility of configurable computing units.
J. Syst. Archit., 2017

2016
Assessing Multi-task Placement Algorithms in RCUs.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Towards Multicore Performance with Configurable Computing Units.
Proceedings of the Architecture of Computing Systems - ARCS 2016, 2016

2015
Addressing processor back-end issues with RCUs.
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015

2013
High performance NoC synthesis using analytical modeling and simulation with optimal power and minimal IC area.
J. Syst. Archit., 2013

Towards Hardware Realizations of Intelligent Systems: A Cortical Column Approach.
Proceedings of the 42nd International Conference on Parallel Processing, 2013

Hardware realization of GALS based cortical column systems.
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013

2012
Synthesis of NoC Interconnects for Custom MPSoC Architectures.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

Synthesis of NoC Interconnects for Multi-core Architectures.
Proceedings of the Sixth International Conference on Complex, 2012

2011
Designing power and performance optimal application-specific Network-on-Chip architectures.
Microprocess. Microsystems, 2011

Wireless vibrotactile feedback system for postural response improvement.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

Multi-objective Tabu Search based topology generation technique for application-specific Network-on-Chip architectures.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Power and Performance Tabu Search Based Multicore Network-on-Chip Design.
Proceedings of the 39th International Conference on Parallel Processing, 2010


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