Anuj Vaishnav

Orcid: 0000-0002-8167-4220

According to our database1, Anuj Vaishnav authored at least 12 papers between 2017 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
FOS: A Modular FPGA Operating System for Dynamic Workloads.
ACM Trans. Reconfigurable Technol. Syst., 2020

Moving Compute towards Data in Heterogeneous multi-FPGA Clusters using Partial Reconfiguration and I/O Virtualisation.
Proceedings of the International Conference on Field-Programmable Technology, 2020

A Self-Compilation Flow Demo on FOS - The FPGA Operating System.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2019
Unexpected Diversity: Quantitative Memory Analysis for Zynq UltraScale+ Systems.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Heterogeneous Resource-Elastic Scheduling for CPU+FPGA Architectures.
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

Scalable Filtering Modules for Database Acceleration on FPGAs.
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

The FOS (FPGA Operating System) Demo.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

2018
IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs.
Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018

Live Migration for OpenCL FPGA Accelerators.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Resource Elastic Virtualization for FPGAs Using OpenCL.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A Survey on FPGA Virtualization.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017
A security library for FPGA interlays.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017


  Loading...