Dirk Koch

According to our database1, Dirk Koch authored at least 110 papers between 2003 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2022
The Future of FPGA Acceleration in Datacenters and the Cloud.
ACM Trans. Reconfigurable Technol. Syst., 2022

How to Shrink My FPGAs - Optimizing Tile Interfaces and the Configuration Logic in FABulous FPGA Fabrics.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

2021
Introduction to the Special Issue on Application-Specific Systems, Architectures and Processors.
J. Signal Process. Syst., 2021

Denial-of-Service on FPGA-based Cloud Infrastructures - Attack and Defense.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

Memristor-Based Pass Gate for FPGA Programmable Routing Switch.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

The FABulous Open eFPGA Ecosystem in Action - From Specifications to Chips to Running Bitsteams.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

FABulous: An Embedded FPGA Framework.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Trusted Configuration in Cloud FPGAs.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Memristor-based Pass Gate Targeting FPGA Look-Up Table.
Proceedings of the International Conference on Electronics, Information, and Communication, 2021

2020
Enabling Dynamic System Integration on Maxeler HLS Platforms.
J. Signal Process. Syst., 2020

FOS: A Modular FPGA Operating System for Dynamic Workloads.
ACM Trans. Reconfigurable Technol. Syst., 2020

FPGADefender: Malicious Self-oscillator Scanning for Xilinx UltraScale + FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2020

Moving Compute towards Data in Heterogeneous multi-FPGA Clusters using Partial Reconfiguration and I/O Virtualisation.
Proceedings of the International Conference on Field-Programmable Technology, 2020

FlexBex: A RISC-V with a Reconfigurable Instruction Extension.
Proceedings of the International Conference on Field-Programmable Technology, 2020

A Self-Compilation Flow Demo on FOS - The FPGA Operating System.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Transparent Integration of a Dynamic FPGA Database Acceleration System.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Resource Elastic Database Acceleration.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Demo: A Closer Look at Malicious Bitstreams.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Securing FPGA Accelerators at the Electrical Level for Multi-tenant Platforms.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Invited Tutorial: FPGA Hardware Security for Datacenters and Beyond.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Power-hammering through Glitch Amplification - Attacks and Mitigation.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Message from the Conference Chairs - ASAP 2020.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

2019
Unexpected Diversity: Quantitative Memory Analysis for Zynq UltraScale+ Systems.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Heterogeneous Resource-Elastic Scheduling for CPU+FPGA Architectures.
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

Scalable Filtering Modules for Database Acceleration on FPGAs.
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

The FOS (FPGA Operating System) Demo.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

EFCAD - An Embedded FPGA CAD Tool Flow for Enabling On-chip Self-Compilation.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

End-to-end Dynamic Stream Processing on Maxeler HLS Platforms.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs.
Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018

Live Migration for OpenCL FPGA Accelerators.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Large Utility Sorting on FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Resource Elastic Virtualization for FPGAs Using OpenCL.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A Survey on FPGA Virtualization.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD Engine.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

HLS Enabled Partially Reconfigurable Module Implementation.
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018

2017
HLS Compilation for CPU Interlays.
Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

A security library for FPGA interlays.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Making a case for an ARM Cortex-A9 CPU interlay replacing the NEON SIMD unit.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Asynchronous interface FIFO design on FPGA for high-throughput NRZ synchronisation.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

BITMAN: A tool and API for FPGA bitstream manipulations.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
A partial reconfiguration controller for Altera Stratix V FPGAs.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Parallel Hardware Merge Sorter.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

ECOSCALE: Reconfigurable computing and runtime system for future exascale systems.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

soft-NEON: A study on replacing the NEON engine of an ARM SoC with a reconfigurable fabric.
Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016

FPGA Versus Software Programming: Why, When, and How?
Proceedings of the FPGAs for Software Programmers, 2016

2015
Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs.
J. Cryptogr. Eng., 2015

Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015).
CoRR, 2015

Placing partially reconfigurable stream processing applications on FPGAs.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Rapid Overlay Builder for Xilinx FPGAs.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2014
Design Tools for Implementing Self-Aware and Fault-Tolerant Systems on FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2014

Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014).
CoRR, 2014

Hierarchical reconfiguration of FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Portable module relocation and bitstream compression for Xilinx FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013
Partial Reconfiguration on FPGAs - Architectures, Tools and Applications
Lecture Notes in Electrical Engineering 153, Springer, ISBN: 978-1-4614-1224-3, 2013

Component based design using constraint programming for module placement on FPGAs.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Simulation framework for cycle-accurate RTL modeling of partial run-time reconfiguration in VHDL.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Thermal Aware Module Placement for Heterogeneous 3D-IC Based FPGAs.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

EasyPR - An easy usable open-source PR system.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Remote FPGA design through eDiViDe - European Digital Virtual Design Lab.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

An efficient FPGA overlay for portable custom instruction set extensions.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Building partial systems with GoAhead.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAhead.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

2012
Dynamic Defragmentation of Reconfigurable Devices.
ACM Trans. Reconfigurable Technol. Syst., 2012

Go Ahead: A Partial Reconfiguration Framework.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

Design techniques for increasing performance and resource utilization of reconfigurable soft CPUs.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

Partial Reconfiguration on FPGAs in Practice - Tools and Applications.
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012

2011
Genetic algorithm using a modified backward pass heuristic for the dynamic facility layout problem.
Paladyn J. Behav. Robotics, 2011

The Xilinx Design Language (XDL): Tutorial and use cases.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Enhancing Resource Utilization with Design Alternatives in Runtime Reconfigurable Systems.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

High Speed Partial Run-Time Reconfiguration Using Enhanced ICAP Hard Macro.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Migrating Static Systems to Partially Reconfigurable Systems on Spartan-6 FPGAs.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

A Routing Architecture for Mapping Dataflow Graphs at Run-Time.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

FPGASort: a high performance sorting architecture exploiting run-time reconfiguration on fpgas for large problem sorting.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2010
No-Break Dynamic Defragmentation of Reconfigurable
CoRR, 2010

Zero logic overhead integration of partially reconfigurable modules.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

Routing optimizations for component-based system design and partial run-time reconfiguration on FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Advanced partial run-time reconfiguration on Spartan-6 FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Obstacle-free two-dimensional online-routing for run-time reconfigurable FPGA-based systems.
Proceedings of the International Conference on Field-Programmable Technology, 2010

A Bus-Based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Fine-Grained Partial Runtime Reconfiguration on Virtex-5 FPGAs.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

A new project to address run-time reconfigurable hardware systems.
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010

Advances in Component-based System Design and Partial Run-time Reconfiguration.
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010

ReCoNets - Design Methodology for Embedded Systems Consisting of Small Networks of Reconfigurable Nodes and Connections.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

2009
Architectures, methods, and tools for distributed run-time reconfigurable FPGA-based systems.
PhD thesis, 2009

Hardware Decompression Techniques for FPGA-Based Embedded Systems.
ACM Trans. Reconfigurable Technol. Syst., 2009

A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Minimizing Internal Fragmentation by Fine-Grained Two-Dimensional Module Placement for Runtime Reconfiguralble Systems.
Proceedings of the FCCM 2009, 2009

2008
Photo-realistic Rendering of Metallic Car Paint from Image-Based Measurements.
Comput. Graph. Forum, 2008

ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS.
Proceedings of the FPL 2008, 2008

No-break dynamic defragmentation of reconfigurable devices.
Proceedings of the FPL 2008, 2008

Efficient Reconfigurable On-Chip Buses for FPGAs.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks.
Proceedings of the Architecture of Computing Systems, 2008

Concepts for Self-Adaptive and Self-Healing Networked Embedded Systems.
Proceedings of the Organic Computing, 2008

2007
Modeling and Synthesis of Hardware-Software Morphing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Bitstream Decompression for High Speed FPGA Configuration from Slow Memories.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

Efficient hardware checkpointing: concepts, overhead analysis, and implementation.
Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

2006
Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems.
EURASIP J. Embed. Syst., 2006

Searching RC5-Keys with Distributed Reconfigurable Computing.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

A Generic Framework for Rapid Prototyping of System-on-Chip Designs.
Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks.
Proceedings of the Architecture of Computing Systems, 2006

2004
Task scheduling for heterogeneous reconfigurable computers.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

Basic OS Support for Distributed Reconfigurable Hardware.
Proceedings of the Computer Systems: Architectures, 2004

FPGA architecture extensions for preemptive multitasking and hardware defragmentation.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Preemptive Hardware Task Management.
Proceedings of the Field Programmable Logic and Application, 2004

A Dynamic NoC Approach for Communication in Reconfigurable Devices.
Proceedings of the Field Programmable Logic and Application, 2004

Platform-independent methodology for partial reconfiguration.
Proceedings of the First Conference on Computing Frontiers, 2004

2003
ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003


  Loading...