Anurup Saha

According to our database, Anurup Saha authored at least 13 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2026

Adaptive Testing of Compute-in-Memory GANs Using Backpropagation-Guided Test Compaction.

Anurup Saha, Ashiqur Rasul, Thomas Walton, Amirali Aghazadeh, Abhijit Chatterjee

Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025

SiPT: Signature-Based Predictive Testing of RRAM Crossbar Arrays for Deep Neural Networks.

Kwondo Ma, Anurup Saha, Chandramouli N. Amarnath, Abhijit Chatterjee

IEEE Trans. Emerg. Top. Comput., 2025

Adaptive Testing of Compute-in-Memory Based CNNs Using Probabilistic Test Acceptance Limits.

Anurup Saha, Kwondo Ma, Chandramouli N. Amarnath, Moinuddin Qureshi, Abhijit Chatterjee

Proceedings of the 31st IEEE International Symposium on On-Line Testing and Robust System Design, 2025

Confidence Driven Compact Testing of Compute-in-Memory Based Language Models.

Anurup Saha, Chandramouli N. Amarnath, Kwondo Ma, Abhijit Chatterjee

Proceedings of the IEEE European Test Symposium, 2025

EGIS: Entropy Guided Image Synthesis for Dataset-Agnostic Testing of RRAM-Based DNNs.

Anurup Saha, Chandramouli N. Amarnath, Kwondo Ma, Abhijit Chatterjee

Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024

Design and implementation of anchor coprocessor architecture for wireless node localization applications.

Rathindra Nath Biswas, Anurup Saha, Swarup Kumar Mitra, Mrinal Kanti Naskar

Peer Peer Netw. Appl., March, 2024

Testing and Tuning of RRAM-Based DNNs: A Machine Learning-Assisted Approach.

Kwondo Ma, Anurup Saha, Suhasini Komarraju, Chandramouli N. Amarnath, Abhijit Chatterjee

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

Efficient Optimized Testing of Resistive RAM Based Convolutional Neural Networks.

Anurup Saha, Kwondo Ma, Chandramouli N. Amarnath, Abhijit Chatterjee

Proceedings of the 30th IEEE International Symposium on On-Line Testing and Robust System Design, 2024

Post-Manufacture Criticality-Aware Gain Tuning of Timing Encoded Spiking Neural Networks for Yield Recovery.

Anurup Saha, Kwondo Ma, Chandramouli N. Amarnath, Abhijit Chatterjee

Proceedings of the IEEE European Test Symposium, 2024

Learning Assisted Post-Manufacture Testing and Tuning of RRAM-Based DNNs for Yield Recovery.

Kwondo Ma, Anurup Saha, Chandramouli N. Amarnath, Abhijit Chatterjee

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Signature Driven Post-Manufacture Testing and Tuning of RRAM Spiking Neural Networks for Yield Recovery.

Anurup Saha, Chandramouli N. Amarnath, Kwondo Ma, Abhijit Chatterjee

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

A Resilience Framework for Synapse Weight Errors and Firing Threshold Perturbations in RRAM Spiking Neural Networks.

Anurup Saha, Chandramouli N. Amarnath, Abhijit Chatterjee

Proceedings of the IEEE European Test Symposium, 2023

2022

Efficient Low Cost Alternative Testing of Analog Crossbar Arrays for Deep Neural Networks.

Kwondo Ma, Anurup Saha, Chandramouli N. Amarnath, Abhijit Chatterjee

Proceedings of the IEEE International Test Conference, 2022