Anyi Tian

According to our database, Anyi Tian authored at least 4 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

A 640-Gb/s 4 × 4-MIMO D-Band CMOS Transceiver Chipset.

Chenxin Liu, Zheng Li, Yudai Yamazaki, Hans Herdian, Chun Wang, Anyi Tian, Jun Sakamaki, Han Nie, Xi Fu, Sena Kato, Wenqian Wang, Hongye Huang, Minzhe Tang, Dingxin Xu, Shinsuke Hara, Akifumi Kasamatsu, Takashi Tomura, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

IEEE J. Solid State Circuits, April, 2025

A D-Band CMOS Transceiver Chipset Supporting 640Gb/s Date Rate with 4?4 Line-of-Sight MIMO.

Chenxin Liu, Zheng Li, Yudai Yamazaki, Hans Herdian, Chun Wang, Anyi Tian, Jun Sakamaki, Han Nie, Xi Fu, Sena Kato, Wenqian Wang, Hongye Huang, Shinsuke Hara, Akifumi Kasamatsu, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

A 640-Gb/s 4×4-MIMO D-Band CMOS Transceiver Chipset.

Chenxin Liu, Zheng Li, Yudai Yamazaki, Hans Herdian, Chun Wang, Anyi Tian, Jun Sakamaki, Han Nie, Xi Fu, Sena Kato, Wenqian Wang, Hongye Huang, Shinsuke Hara, Akifumi Kasamatsu, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS.

Takaya Uchino, Yudai Yamazaki, Sunghwan Park, Chenxin Liu, Anyi Tian, Abanob Shehata, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024