Archana Chidanandan

According to our database1, Archana Chidanandan authored at least 8 papers between 2002 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
In their words: student feedback on an international project collaboration.
Proceedings of the 41st ACM technical symposium on Computer science education, 2010

2008
Adopting pen-based technology to facilitate active learning in the classroom: is it right for you?
Proceedings of the 13th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2008

2007
Design and Implementation of a Minuscule General Purpose Processor in an Undergraduate Computer Architecture Course.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2006
NEDA: a low-power high-performance DCT architecture.
IEEE Trans. Signal Process., 2006

Area-Efficient NEDA Architecture for The 1-D DCT/IDCT.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

2005
Novel systolic array architecture for the decorrelator using conjugate gradient for least squares algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Enhanced Parallel Interference Cancellation using Decorrelator for the base-station receiver.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002
A Low Power High Performance Distributed DCT Architecture.
Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002


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