Arka Dutta

According to our database, Arka Dutta authored at least 14 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

Down the Toxicity Rabbit Hole: Investigating PaLM 2 Guardrails.

Adel Khorramrouz, Sujan Dutta, Arka Dutta, Ashiqur R. KhudaBukhsh

CoRR, 2023

Classification of Cricket Shots from Cricket Videos Using Self-attention Infused CNN-RNN (SAICNN-RNN).

Arka Dutta, Abhishek Baral, Sayan Kundu, Sayantan Biswas, Kousik Dasgupta, Hasanujaman

Proceedings of the Computational Intelligence in Communications and Business Analytics, 2023

2019

Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application.

Swarnil Roy, Sagar Mukherjee, Arka Dutta, Chandan Kumar Sarkar, Chayanika Bose

IET Circuits Devices Syst., 2019

2018

Implementation of Low Power Programmable Flash ADC Using IDUDGMOSFET.

Sagar Mukherjee, Arka Dutta, Swarnil Roy, Chandan Kumar Sarkar

IEEE Trans. Circuits Syst. II Express Briefs, 2018

2016

Influence of channel length and high-K oxide thickness on subthreshold analog/RF performance of graded channel and gate stack DG-MOSFETs.

Sanjit Kumar Swain, Arka Dutta, Sarosij Adak, Sudhansu Kumar Pati, Chandan Kumar Sarkar

Microelectron. Reliab., 2016

Impact of temperature on linearity and harmonic distortion characteristics of underlapped FinFET.

Arka Dutta, Kalyan Koley, Samar K. Saha, Chandan Kumar Sarkar

Microelectron. Reliab., 2016

Study on effect of back oxide thickness variation in FDSOI MOSFET on analogue circuit performance.

Sagar Mukherjee, Swarnil Roy, Arka Dutta, Chandan Kumar Sarkar

IET Circuits Devices Syst., 2016

Low-power amplitude modulator for wireless application using underlap double-gate metal-oxide-semiconductor field-effect transistor.

Sagar Mukherjee, Kalyan Koley, Arka Dutta, Chandan Kumar Sarkar

IET Circuits Devices Syst., 2016

2015

Impact of lateral straggle on analog and digital circuit performance using independently driven underlap DG-MOSFET.

Sagar Mukherjee, Arka Dutta, Swarnil Roy, Kalyan Koley, Chandan Kumar Sarkar

Microelectron. J., 2015

Asymmetric Underlap Dual Material Gate DG-FET for Low Power Analog/RF Applications.

Atanu Kundu, Arka Dutta, Chandan Kumar Sarkar

J. Low Power Electron., 2015

2014

Study of body and oxide thickness variation on analog and RF performance of underlap DG-MOSFETs.

Sudhansu Kumar Pati, Kalyan Koley, Arka Dutta, N. Mohankumar, Chandan Kumar Sarkar

Microelectron. Reliab., 2014

Impact of gate metal work-function engineering for enhancement of subthreshold analog/RF performance of underlap dual material gate DG-FET.

Atanu Kundu, Kalyan Koley, Arka Dutta, Chandan Kumar Sarkar

Microelectron. Reliab., 2014

Analysis of Harmonic distortion in asymmetric underlap DG-MOSFET with high-k spacer.

Arka Dutta, Kalyan Koley, Chandan Kumar Sarkar

Microelectron. Reliab., 2014

RF parameter extraction of underlap DG MOSFETs: a look up table based approach.

Atanu Kundu, Arka Dutta, Kalyan Koley, S. Niyogi, Chandan Kumar Sarkar

IET Circuits Devices Syst., 2014