Arun Raghavan

According to our database1, Arun Raghavan authored at least 12 papers between 2008 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
RAPID: In-Memory Analytical Query Processing Engine with Extreme Performance per Watt.
Proceedings of the 2018 International Conference on Management of Data, 2018

2017
A many-core architecture for in-memory data processing.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Big Data Processing: Scalability with Extreme Single-Node Performance.
Proceedings of the 2017 IEEE International Congress on Big Data, 2017

2015
Rethinking SIMD Vectorization for In-Memory Databases.
Proceedings of the 2015 ACM SIGMOD International Conference on Management of Data, Melbourne, Victoria, Australia, May 31, 2015

2013
Designing for Responsiveness with Computational Sprinting.
IEEE Micro, 2013

Utilizing Dark Silicon to Save Energy with Computational Sprinting.
IEEE Micro, 2013

TRANSIT: specifying protocols with concolic snippets.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

Computational sprinting on a hardware/software testbed.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2013

2012
Computational sprinting.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2010
Token tenure and PATCH: A predictive/adaptive token-counting hybrid.
ACM Trans. Archit. Code Optim., 2010

RETCON: transactional repair without replay.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

2008
Token tenure: PATCHing token counting using directory-based cache coherence.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008


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