Aruna Kumari Neelam

Orcid: 0000-0003-1703-8876

Affiliations:
  • Vellore Institute of Technology, School of Electronics Engineering, India
  • National Institute of Technology Warangal (NIT Warangal), Department of Electronics and Communication Engineering,Telangana, India (PhD 2023)


According to our database1, Aruna Kumari Neelam authored at least 7 papers between 2022 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
Design and Analysis of Dual-k Spacer CombFET for Digital and Synaptic Applications.
IEEE Access, 2025

Challenges and Advances in Materials and Fabrication Technologies for the Development of p-GaN Gated E-Mode AlGaN/GaN Power HEMTs: A Critical Review.
IEEE Access, 2025

2024
Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications.
IEEE Access, 2024

Performance Comparison of Nanosheet FET, CombFET, and TreeFET: Device and Circuit Perspective.
IEEE Access, 2024

2023
Investigation on effect of AlN barrier thickness and lateral scalability of Fe-doped recessed T-gate AlN/GaN/SiC HEMT with polarization-graded back barrier for future RF electronic applications.
Microelectron. J., October, 2023

Exploring the Performance of 3-D Nanosheet FET in Inversion and Junctionless Modes: Device and Circuit-Level Analysis and Comparison.
IEEE Access, 2023

2022
Device and circuit-level performance comparison of GAA nanosheet FET with varied geometrical parameters.
Microelectron. J., 2022


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