Arunkumar Salimath

Orcid: 0000-0003-4627-929X

According to our database1, Arunkumar Salimath authored at least 9 papers between 2010 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2022
An Incremental-ΔΣ ADC With 106-dB DR for Reconfigurable Class-D Audio Amplifiers.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

2019
An 86% Efficiency, Wide-V <sub>in</sub> SIMO DC-DC Converter Embedded in a Car-Radio IC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Design of a SIBO DC-DC Converter for AMOLED Display Driving.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

An 86% efficiency SIMO DC-DC converter with one boost, one buck, and a floating output voltage for car-radio.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Design Considerations for Integrated, High-Voltage DC-DC Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A high-speed level shifting technique and its application in high-voltage, synchronous DC-DC converters with quasi-ZVS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2014
A 1 V, Sub-mW CMOS LNA for Low-Power 1 GHz Wide-Band Wireless Applications.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

2012
An Ultra-low Power Symbol Detection Methodology and Its Circuit Implementation for a Wake-up Receiver in Wireless Sensor Nodes.
Proceedings of the 25th International Conference on VLSI Design, 2012

2010
A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010


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