Asgar Abbaszadeh

According to our database, Asgar Abbaszadeh authored at least 4 papers between 2009 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Low complexity digital background calibration algorithm for the correction of timing mismatch in time-interleaved ADCs.

Asgar Abbaszadeh, Esmaeil Najafi Aghdam, Alfredo Rosado Muñoz

Microelectron. J., 2019

2011

Efficient realization of reconfigurable FIR filter using the new coefficient representation.

Khosrov Dabbagh-Sadeghipour, Asgar Abbaszadeh

IEICE Electron. Express, 2011

A new hardware efficient reconfigurable fir filter architecture suitable for FPGA applications.

Asgar Abbaszadeh, Anasystem Azerbaijan, Khosrov Dabbagh-Sadeghipour

Proceedings of the 17th International Conference on Digital Signal Processing, 2011

2009

A new FPGA-based postprocessor architecture for channel mismatch correction of time interleaved ADCS.

Asgar Abbaszadeh, Khosrov Dabbagh-Sadeghipour

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009