Atsushi Kamo

According to our database, Atsushi Kamo authored at least 10 papers between 1998 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2005

Modified hybrid reduction technique for the simulation of linear/nonlinear mixed circuits.

Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits.

Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai

Proceedings of the 2004 Design, 2004

2002

A Novel Application of Verilog-A to Modeling and Simulation of High-Speed Interconnects in Time/Frequency Transform-Domain.

Kenichi Suzuki, Mitsuhiro Takeda, Atsushi Kamo, Hideki Asai

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique.

Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

Noise analysis of power/ground planes on PCB by SPICE-like simulator with model order reduction technique.

Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method.

I. Hattori, Atsushi Kamo, Takayuki Watanabe, Hideki Asai

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

High-speed interconnect simulation using MIMO type of adaptive least square method.

Masaya Suzuki, Hirofumi Miyashita, Atsushi Kamo, Takayuki Watanabe, Hideki Asai

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Simulation for the optimal placement of decoupling capacitors on printed circuit board.

Atsushi Kamo, Takayuki Watanabe, Hideki Asai

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1999

Expanded GMC for transient analysis of transmission line networks.

Atsushi Kamo, Takayuki Watanabe, Hideki Asai

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998

Neural network simulator for spatiotemporal pattern analysis.

Atsushi Kamo, Hiroshi Ninomiya, Teru Yoneyama, Hideki Asai

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998