B. Srinivasu

Orcid: 0000-0003-0974-8245

According to our database1, B. Srinivasu authored at least 4 papers between 2017 and 2023.

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Bibliography

2023
Memristor-based High Speed and Area Efficient Comparators in IMPLY Logic.
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

2022
High Performance Ternary Full Adder in CNFET-Memristor Logic Technology.
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2018
CoLPUF : A Novel Configurable LFSR-based PUF.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017


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