Badr Malki

According to our database, Badr Malki authored at least 7 papers between 2012 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

A 150 kHz-80 MHz BW Discrete-Time Analog Baseband for Software-Defined-Radio Receivers using a 5th-Order IIR LPF, Active FIR and a 10 bit 300 MS/s ADC in 28 nm CMOS.

Badr Malki, Bob Verbruggen, Ewout Martens, Piet Wambacq, Jan Craninckx

IEEE J. Solid State Circuits, 2016

2015

Correction to "A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range".

Badr Malki, Takaya Yamamoto, Bob Verbruggen, Piet Wambacq, Jan Craninckx

IEEE J. Solid State Circuits, 2015

A 150 kHz-80 MHz BW DT analog baseband for SDR RX using a 5^th-order IIR LPF, active FIR and 10b 300 MS/s ADC in 28nm CMOS.

Badr Malki, Bob Verbruggen, Ewout Martens, Piet Wambacq, Jan Craninckx

Proceedings of the ESSCIRC Conference 2015, 2015

2014

A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range.

Badr Malki, Takaya Yamamoto, Bob Verbruggen, Piet Wambacq, Jan Craninckx

IEEE J. Solid State Circuits, 2014

A 70 dB SNDR 200 MS/s 2.3 mW dynamic pipelined SAR ADC in 28nm digital CMOS.

Bob Verbruggen, Kazuaki Deguchi, Badr Malki, Jan Craninckx

Proceedings of the Symposium on VLSI Circuits, 2014

A complementary dynamic residue amplifier for a 67 dB SNDR 1.36 mW 170 MS/s pipelined SAR ADC.

Badr Malki, Bob Verbruggen, Piet Wambacq, Kazuaki Deguchi, Masao Iriguchi, Jan Craninckx

Proceedings of the ESSCIRC 2014, 2014

2012

A 70dB DR 10b 0-to-80MS/s current-integrating SAR ADC with adaptive dynamic range.

Badr Malki, Takaya Yamamoto, Bob Verbruggen, Piet Wambacq, Jan Craninckx

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012