Balakrishna Kumthekar

According to our database1, Balakrishna Kumthekar authored at least 3 papers between 1997 and 2000.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2000
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs.
Proceedings of the 2000 Design, 2000

1998
In-Place Power Optimization for LUT-Based FPGAs.
Proceedings of the 35th Conference on Design Automation, 1998

1997
A symbolic algorithm for low-power sequential synthesis.
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997


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