Enrico Macii
Orcid: 0000-0001-9046-5618
According to our database1,
Enrico Macii
authored at least 475 papers
between 1991 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2006, "For contributions to power-efficient very large scaled integrated (VLSI) circuits and systems.".
Timeline
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Online presence:
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Bibliography
2024
Automatic Layer Freezing for Communication Efficiency in Cross-Device Federated Learning.
IEEE Internet Things J., February, 2024
IEEE Internet Things J., January, 2024
Optimized Deployment of Deep Neural Networks for Visual Pose Estimation on Nano-drones.
CoRR, 2024
HW-SW Optimization of DNNs for Privacy-preserving People Counting on Low-resolution Infrared Arrays.
CoRR, 2024
2023
Efficient Deep Learning Models for Privacy-Preserving People Counting on Low-Resolution Infrared Arrays.
IEEE Internet Things J., August, 2023
IEEE Trans. Ind. Informatics, July, 2023
IEEE Trans. Veh. Technol., May, 2023
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge.
IEEE Trans. Computers, March, 2023
IEEE Embed. Syst. Lett., March, 2023
Reducing the Energy Consumption of sEMG-Based Gesture Recognition at the Edge Using Transformers and Dynamic Inference.
Sensors, February, 2023
Environ. Model. Softw., February, 2023
W2WNet: A two-module probabilistic Convolutional Neural Network with embedded data cleansing functionality.
Expert Syst. Appl., 2023
Enhancing Neural Architecture Search with Multiple Hardware Constraints for Deep Learning Model Deployment on Tiny IoT Devices.
CoRR, 2023
Neuro-symbolic Empowered Denoising Diffusion Probabilistic Models for Real-time Anomaly Detection in Industry 4.0.
CoRR, 2023
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
Review of open neuromorphic architectures and a first integration in the RISC-V PULP platform.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Enabling DVFS Side-Channel Attacks for Neural Network Fingerprinting in Edge Inference Services.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Robotic Arm Dataset (RoAD): A Dataset to Support the Design and Test of Machine Learning-Driven Anomaly Detection in a Production Line.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023
Neuro-Symbolic Empowered Denoising Diffusion Probabilistic Models for Real-Time Anomaly Detection in Industry 4.0: Wild-and-Crazy-Idea Paper.
Proceedings of the Forum on Specification & Design Languages, 2023
Proceedings of the 28th IEEE International Conference on Emerging Technologies and Factory Automation, 2023
Energy-efficient Wearable-to-Mobile Offload of ML Inference for PPG-based Heart-Rate Estimation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the 47th IEEE Annual Computers, Software, and Applications Conference, 2023
Proceedings of the 47th IEEE Annual Computers, Software, and Applications Conference, 2023
Proceedings of the 2023 IEEE World AI IoT Congress (AIIoT), 2023
2022
Guest Editorial: Thematic Section on Applications of Emerging Computing Technologies in Smart Manufacturing and Industry 4.0.
IEEE Trans. Emerg. Top. Comput., 2022
Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks.
ACM Trans. Embed. Comput. Syst., 2022
Traffic Load Estimation from Structural Health Monitoring sensors using supervised learning.
Sustain. Comput. Informatics Syst., 2022
A User-Centric View of a Demand Side Management Program: From Surveys to Simulation and Analysis.
IEEE Syst. J., 2022
Human activity recognition: suitability of a neuromorphic approach for on-edge AIoT applications.
Neuromorph. Comput. Eng., 2022
Non-intrusive load monitoring techniques for the disaggregation of ON/OFF appliances.
Energy Inform., 2022
Solar radiation forecasting with deep learning techniques integrating geostationary satellite images.
Eng. Appl. Artif. Intell., 2022
SMART-IC: Smart Monitoring and Production Optimization for Zero-waste Semiconductor Manufacturing.
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022
Multi-Complexity-Loss DNAS for Energy-Efficient and Memory-Constrained Deep Neural Networks.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 13th IEEE International Green and Sustainable Computing Conference, 2022
Bioformers: Embedding Transformers for Ultra-Low Power sEMG-based Gesture Recognition.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Proceedings of the 46th IEEE Annual Computers, Software, and Applications Conferenc, 2022
Comparative Analysis of Neural Networks Techniques for Lithium-ion Battery SOH Estimation.
Proceedings of the 46th IEEE Annual Computers, Software, and Applications Conferenc, 2022
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2022
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022
2021
A Microservices-Based Framework for Smart Design and Optimization of PV Installations.
IEEE Trans. Sustain. Comput., 2021
Assessing the Impact of Sensor-Based Task Scheduling on Battery Lifetime in IoT Devices.
IEEE Trans. Instrum. Meas., 2021
IEEE Trans. Ind. Informatics, 2021
IEEE Trans. Emerg. Top. Comput., 2021
IEEE Trans. Emerg. Top. Comput., 2021
IEEE Trans. Computers, 2021
IEEE Trans. Biomed. Circuits Syst., 2021
Optimizing Quality Inspection and Control in Powder Bed Metal Additive Manufacturing: Challenges and Research Directions.
Proc. IEEE, 2021
Leading Information and Communication Technologies for Smart Manufacturing: Facing the New Challenges and Opportunities of the 4th Industrial Revolution.
Proc. IEEE, 2021
Enhancing manufacturing intelligence through an unsupervised data-driven methodology for cyclic industrial processes.
Expert Syst. Appl., 2021
Expert Syst. Appl., 2021
Solar radiation forecasting based on convolutional neural network and ensemble learning.
Expert Syst. Appl., 2021
A Win-Win Algorithm for Learning the Flexibility of Aggregated Residential Appliances.
IEEE Access, 2021
Comparative Analysis of Neural Networks Techniques to Forecast Global Horizontal Irradiance.
IEEE Access, 2021
On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021
Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021
Configuring an Embedded Neuromorphic Coprocessor Using a RISC-V Chip for Enabling Edge Computing Applications.
Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the International Joint Conference on Neural Networks, 2021
Image analytics and machine learning for in-situ defects detection in Additive Manufacturing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Pruning In Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Design of District-level Photovoltaic Installations for Optimal Power Production and Economic Benefit.
Proceedings of the IEEE 45th Annual Computers, Software, and Applications Conference, 2021
Proceedings of the IEEE 45th Annual Computers, Software, and Applications Conference, 2021
Ultra-compact binary neural networks for human activity recognition on RISC-V processors.
Proceedings of the CF '21: Computing Frontiers Conference, 2021
2020
Modeling and Simulation of Cyber-Physical Electrical Energy Systems With SystemC-AMS.
IEEE Trans. Sustain. Comput., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
An Engineering Process model for managing a digitalised life-cycle of products in the Industry 4.0.
Proceedings of the NOMS 2020, 2020
Proceedings of the 17th IEEE International Symposium on Biomedical Imaging, 2020
Proceedings of the 2020 IEEE International Conference on Multimedia & Expo Workshops, 2020
Proceedings of the ICGDA 2020: 3rd International Conference on Geoinformatics and Data Analysis, 2020
Energy-Efficient Adaptive Machine Learning on IoT End-Nodes With Class-Dependent Confidence.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Predicting Hard Disk Failures in Data Centers Using Temporal Convolutional Neural Networks.
Proceedings of the Euro-Par 2020: Parallel Processing Workshops, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Optimal Configuration and Placement of PV Systems in Building Roofs with Cost Analysis.
Proceedings of the 44th IEEE Annual Computers, Software, and Applications Conference, 2020
GAMES: A General-Purpose Architectural Model for Multi-energy System Engineering Applications.
Proceedings of the 44th IEEE Annual Computers, Software, and Applications Conference, 2020
2019
Battery-Aware Operation Range Estimation for Terrestrial and Aerial Electric Vehicles.
IEEE Trans. Veh. Technol., 2019
A Cross-level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors.
ACM Trans. Design Autom. Electr. Syst., 2019
SystemC-AMS Thermal Modeling for the Co-simulation of Functional and Extra-Functional Properties.
ACM Trans. Design Autom. Electr. Syst., 2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
IEEE Access, 2019
A SystemC-AMS Framework for the Design and Simulation of Energy Management in Electric Vehicles.
IEEE Access, 2019
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the Workshops of the EDBT/ICDT 2019 Joint Conference, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the Advanced Information Systems Engineering Workshops, 2019
Proceedings of the 2019 IEEE International Congress on Big Data, 2019
PREMISES, a Scalable Data-Driven Service to Predict Alarms in Slowly-Degrading Multi-Cycle Industrial Processes.
Proceedings of the 2019 IEEE International Congress on Big Data, 2019
2018
Thermal Management of Batteries Using Supercapacitor Hybrid Architecture With Idle Period Insertion Strategy.
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Image Process., 2018
Optimizing Network Traffic for Spiking Neural Network Simulations on Densely Interconnected Many-Core Neuromorphic Platforms.
IEEE Trans. Emerg. Top. Comput., 2018
GIS-Based Software Infrastructure to Model PV Generation in Fine-Grained Spatio-Temporal Domain.
IEEE Syst. J., 2018
Microelectron. Reliab., 2018
IEEE Des. Test, 2018
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018
Mapping Spiking Neural Networks on Multi-core Neuromorphic Platforms: Problem Formulation and Performance Analysis.
Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018
Distributed Infrastructure for Multi-Energy-Systems Modelling and Co-simulation in Urban Districts.
Proceedings of the 7th International Conference on Smart Cities and Green ICT Systems, 2018
Non-linear Autoregressive Neural Networks to Forecast Short-Term Solar Radiation for Photovoltaic Energy Predictions.
Proceedings of the Smart Cities, Green Technologies and Intelligent Transport Systems, 2018
Proceedings of the 7th International Conference on Smart Cities and Green ICT Systems, 2018
Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
IoT Software Infrastructure for Remote Monitoring of Patients with Chronic Metabolic Disorders.
Proceedings of the 6th IEEE International Conference on Future Internet of Things and Cloud, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Predicting the Oncogenic Potential of Gene Fusions Using Convolutional Neural Networks.
Proceedings of the Computational Intelligence Methods for Bioinformatics and Biostatistics, 2018
Multiple alignment of packet sequences for efficient communication in a many-core neuromorphic system: work-in-progress.
Proceedings of the International Conference on Compilers, 2018
Impact of graph partitioning on SNN placement for a multi-core neuromorphic architecture: work-in-progress.
Proceedings of the International Conference on Compilers, 2018
Proceedings of the Biomedical Engineering Systems and Technologies, 2018
Colorectal Cancer Classification using Deep Convolutional Networks - An Experimental Study.
Proceedings of the 11th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2018), 2018
2017
ACM Trans. Design Autom. Electr. Syst., 2017
IEEE Trans. Ind. Informatics, 2017
IEEE Trans. Emerg. Top. Comput., 2017
A Layered Methodology for the Simulation of Extra-Functional Properties in Smart Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocess. Microsystems, 2017
A scalable middleware-based infrastructure for energy management and visualization in city districts.
EAI Endorsed Trans. Cloud Syst., 2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Proceedings of the New Generation of CAS, 2017
Proceedings of the New Generation of CAS, 2017
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
PVInGrid: A Distributed Infrastructure for Evaluating the Integration of Photovoltaic Systems in Smart Grid.
Proceedings of the Technological Innovation for Smart Systems, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Building Energy Modelling and Monitoring by Integration of IoT Devices and Building Information Models.
Proceedings of the 41st IEEE Annual Computer Software and Applications Conference, 2017
A Multi-modal Brain Image Registration Framework for US-guided Neuronavigation Systems - Integrating MR and US for Minimally Invasive Neuroimaging.
Proceedings of the 10th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2017), 2017
2016
IEEE Trans. Smart Grid, 2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Event-Driven User-Centric Middleware for Energy-Efficient Buildings and Public Spaces.
IEEE Syst. J., 2016
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016
Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016
Frequency domain characterization of batteries for the design of energy storage subsystems.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016
Distributed Software Infrastructure for Evaluating the Integration of Photovoltaic Systems in Urban Districts.
Proceedings of the SMARTGREENS 2016, 2016
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Automated 3D immunofluorescence analysis of Dorsal Root Ganglia for the investigation of neural circuit alterations: a preliminary study.
Proceedings of the Position Papers of the 2016 Federated Conference on Computer Science and Information Systems, 2016
IP-XACT for smart systems design: extensions for the integration of functional and extra-functional models.
Proceedings of the 2016 Forum on Specification and Design Languages, 2016
CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Serial T0: approximate bus encoding for energy-efficient transmission of sensor signals.
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
A Statistical Model-Based Cell-to-Cell Variability Management of Li-ion Battery Pack.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Microprocess. Microsystems, 2015
Microprocess. Microsystems, 2015
Proceedings of the 28th International Conference on VLSI Design, 2015
Proceedings of the VLSI-SoC: Design for Reliability, Security, and Low Power, 2015
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
multiFLEX: Flexible Multi-utility, Multi-service Smart Metering Architecture for Energy Vectors with Active Prosumers.
Proceedings of the SMARTGREENS 2015, 2015
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015
An automated design flow for approximate circuits based on reduced precision redundancy.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
An aging-aware battery charge scheme for mobile devices exploiting plug-in time patterns.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
A tool-chain to foster a new business model for photovoltaic systems integration exploiting an Energy Community approach.
Proceedings of the 20th IEEE Conference on Emerging Technologies & Factory Automation, 2015
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015
Proceedings of the Workshops of the EDBT/ICDT 2015 Joint Conference (EDBT/ICDT), 2015
A new distributed framework for integration of district energy data from heterogeneous devices.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 2015 IEEE International Congress on Big Data, New York City, NY, USA, June 27, 2015
2014
Energy/Lifetime Cooptimization by Cache Partitioning With Graceful Performance Degradation.
IEEE Trans. Very Large Scale Integr. Syst., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Microelectron. J., 2014
J. Electron. Test., 2014
Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, 2014
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014
miR-SEA: miRNA Seed Extension based Aligner Pipeline for NGS Expression Level Extraction.
Proceedings of the International Work-Conference on Bioinformatics and Biomedical Engineering, 2014
An open-source framework for formal specification and simulation of electrical energy systems.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
A compact macromodel for the charge phase of a battery with typical charging protocol.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the Internet of Things. User-Centric IoT, 2014
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Design and implementation of a multi-standard event-driven energy management system for smart buildings.
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
A cross-level verification methodology for digital IPs augmented with embedded timing monitors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
Gelsius: A Literature-Based Workflow for Determining Quantitative Associations between Genes and Biological Processes.
IEEE ACM Trans. Comput. Biol. Bioinform., 2013
Layout-Driven Post-Placement Techniques for Temperature Reduction and Thermal Gradient Minimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Modeling and characterization of thermally induced skew on clock distribution networks of nanometric ICs.
Microelectron. J., 2013
Integration of Literature with Heterogeneous Information for Genes Correlation Scoring.
ACM J. Emerg. Technol. Comput. Syst., 2013
J. Comput. Chem., 2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
A framework with temperature-aware accuracy levels for battery modeling from datasheets.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Investigating the behavior of physical defects in pn-junction based reconfigurable graphene devices.
Proceedings of the 14th Latin American Test Workshop, 2013
Technique based on On-Chip Current Sensors and Neighbourhood Comparison Logic to detect resistive-open defects in SRAMs.
Proceedings of the 14th Latin American Test Workshop, 2013
Enable sensor networks interoperability in smart public spaces through a service oriented approach.
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013
A statistical model of cell-to-cell variation in Li-ion batteries for system-level design.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
An automated framework for generating variable-accuracy battery models from datasheet information.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Exploration of different implementation styles for graphene-based reconfigurable gates.
Proceedings of 2013 International Conference on IC Design & Technology, 2013
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
A Novel Pipeline for V(D)J Junction Identification using RNA-Seq Paired-end Reads.
Proceedings of the BIOINFORMATICS 2013 - Proceedings of the International Conference on Bioinformatics Models, Methods and Algorithms, Barcelona, Spain, 11, 2013
A Preliminary Analysis on HEp-2 Pattern Classification: Evaluating Strategies Based on Support Vector Machines and Subclass Discriminant Analysis.
Proceedings of the Biomedical Engineering Systems and Technologies, 2013
Classification of HEp-2 Staining Patterns in ImmunoFluorescence Images - Comparison of Support Vector Machines and Subclass Discriminant Analysis Strategies.
Proceedings of the BIOINFORMATICS 2013 - Proceedings of the International Conference on Bioinformatics Models, Methods and Algorithms, Barcelona, Spain, 11, 2013
2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
IET Circuits Devices Syst., 2012
Computer-aided techniques for chromogenic immunohistochemistry: Status and directions.
Comput. Biol. Medicine, 2012
Bellerophontes: an RNA-Seq data analysis framework for chimeric transcripts discovery based on accurate fusion model.
Bioinform., 2012
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Applying textural features to the classification of HEp-2 cell patterns in IIF images.
Proceedings of the 21st International Conference on Pattern Recognition, 2012
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
Investigating the effects of Inverted Temperature Dependence (ITD) on clock distribution networks.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Middleware services for network interoperability in smart energy efficient buildings.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Characterization of Coarse Grain Molecular Dynamic Simulation Performance on Graphic Processing Unit Architectures.
Proceedings of the BIOINFORMATICS 2012 - Proceedings of the International Conference on Bioinformatics Models, Methods and Algorithms, Vilamoura, Algarve, Portugal, 1, 2012
A Novel Analysis Flow for Fused Transcripts Discovery from Paired-end RNA-Seq Data.
Proceedings of the BIOINFORMATICS 2012 - Proceedings of the International Conference on Bioinformatics Models, Methods and Algorithms, Vilamoura, Algarve, Portugal, 1, 2012
2011
Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Biomed. Eng., 2011
A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design.
J. Low Power Electron., 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Guest Editorial Advances in Design of Energy-Efficient Circuits and Systems (Second Issue).
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Proceedings of the 12th Latin American Test Workshop, 2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Binding Free Energy Calculation via Molecular Dynamics Simulations for a miRNA: mRNA Interaction.
Proceedings of the BIOINFORMATICS 2011, 2011
Improving Latent Semantic Analysis of Biomedical Literature Integrating UMLS Metathesaurus and Biomedical Pathways Databases.
Proceedings of the Biomedical Engineering Systems and Technologies, 2011
A New Latent Semantic Analysis based Methodology for Knowledge Extraction from Biomedical Literature and Biological Pathways Databases.
Proceedings of the BIOINFORMATICS 2011, 2011
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2011
A novel framework for chimeric transcript detection based on accurate gene fusion model.
Proceedings of the 2011 IEEE International Conference on Bioinformatics and Biomedicine Workshops, 2011
2010
Temperature-Insensitive Dual- V<sub>th</sub> Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence.
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking.
IEEE Trans. Computers, 2010
Microelectron. J., 2010
A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits.
J. Low Power Electron., 2010
Comput. Methods Programs Biomed., 2010
Achieving the way for automated segmentation of nuclei in cancer tissue images through morphology-based approach: A quantitative evaluation.
Comput. Medical Imaging Graph., 2010
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Generating power-hungry test programs for power-aware validation of pipelined processors.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
MicroRNA Target Prediction and Exploration through Candidate Binding Sites Generation.
Proceedings of the CISIS 2010, 2010
An Automated Tool for Scoring Biomedical Terms Correlation Based on Semantic Analysis.
Proceedings of the CISIS 2010, 2010
Proceedings of the 2010 IEEE International Conference on Bioinformatics and Biomedicine Workshops, 2010
2009
Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating.
J. Low Power Electron., 2009
Enhanced switching activity balancing encoding schemes for uniform temperature distribution in on-chip buses.
J. Embed. Comput., 2009
Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
Physically clustered forward body biasing for variability compensation in nanometer CMOS design.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
J. Low Power Electron., 2008
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations.
Integr., 2008
Comput. Math. Appl., 2008
Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
Multiple power-gating domain (multi-VGND) architecture for improved leakage power reduction.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Process Variation Tolerant Pipeline Design Through a Placement-Aware Multiple Voltage Island Design Style.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Automated Discrimination of Pathological Regions in Tissue Images: Unsupervised Clustering vs. Supervised SVM Classification.
Proceedings of the Biomedical Engineering Systems and Technologies, 2008
Fully-Automated Segmentation of Tumor Areas in Tissue Confocal Images - Comparison between a Custom Unsupervised and a Supervised SVM Approach.
Proceedings of the First International Conference on Biomedical Electronics and Devices, 2008
Segmentation of nuclei in cancer tissue images: Contrasting active contours with morphology-based approach.
Proceedings of the 8th IEEE International Conference on Bioinformatics and Bioengineering, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Control and datapath decoupling in the design of a NoC switch: area, power and performance implications.
Proceedings of the International Symposium on System-on-Chip, 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Power-optimal RTL arithmetic unit soft-macro selection strategy for leakage-sensitive technologies.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Early Power-Aware Design & Validation: Myth or Reality?
Proceedings of the 44th Design Automation Conference, 2007
Selection of Tumor Areas and Segmentation of Nuclear Membranes in Tissue Confocal Images: A Fully Automated Approach.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2007
Proceedings of the 7th IEEE International Conference on Bioinformatics and Bioengineering, 2007
2006
IEEE Trans. Consumer Electron., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Nucleic Acids Res., 2006
J. Low Power Electron., 2006
Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications.
J. Low Power Electron., 2006
Int. J. Artif. Intell. Tools, 2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Proceedings of the 11th IEEE Symposium on Computers and Communications (ISCC 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 19th IEEE International Symposium on Computer-Based Medical Systems (CBMS 2006), 2006
2005
IEEE Trans. Inf. Technol. Biomed., 2005
IEEE Trans. Consumer Electron., 2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Trans. Biomed. Eng., 2005
Design and Implementation of a Memory Generator for Low-Energy Application-Specific Block-Enabled SRAMs.
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Exploring the impact of architectural parameters on energy efficiency of application-specific block-enabled SRAMs.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
2004
Memory energy minimization by data compression: algorithms, architectures and implementation.
IEEE Trans. Very Large Scale Integr. Syst., 2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the Integrated Circuit and System Design, 2004
Proceedings of the 2004 International Symposium on Physical Design, 2004
Limited intra-word transition codes: an energy-efficient bus encoding for LCD display interfaces.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Post-layout leakage power minimization based on distributed sleep transistor insertion.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Crosstalk energy reduction by temporal shielding.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Energy-performance tradeoffs for the shared memory in multi-processor systems-on-chip.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC.
Proceedings of the 2004 Design, 2004
Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning.
Proceedings of the 2004 Design, 2004
Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating.
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 4th IEEE International Symposium on BioInformatics and BioEngineering (BIBE 2004), 2004
2003
IEEE Trans. Very Large Scale Integr. Syst., 2003
IEEE Trans. Computers, 2003
Proceedings of the Integrated Circuit and System Design, 2003
Hardw are Implementation of Data Compression Algorithms for Memory Energy Optimization.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Increasing the locality of memory access patterns by low-overhead hardware address relocation.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
Minimizing memory access energy in embedded systems by selective instruction compression.
IEEE Trans. Very Large Scale Integr. Syst., 2002
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
An adaptive data compression scheme for memory traffic minimization in processor-based systems.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002
Proceedings of the 2002 Design, 2002
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors.
Proceedings of the 2002 Design, 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
Estimation of lower and upper bounds on the power consumption from scheduled data flow graphs.
IEEE Trans. Very Large Scale Integr. Syst., 2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
Synthesis of power-managed sequential components based oncomputational kernel extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Guest Editor's Introduction: Dynamic Power Management of Electronic Systems.
IEEE Des. Test Comput., 2001
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip.
Proceedings of the 38th Design Automation Conference, 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
Power optimization of technology-dependent circuits based on symbolic computation of logic implications.
ACM Trans. Design Autom. Electr. Syst., 2000
Symbolic optimization of interacting controllers based onredundancy identification and removal.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation.
IEEE Des. Test Comput., 2000
Proceedings of the Integrated Circuit Design, 2000
Proceedings of the Integrated Circuit Design, 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000
Proceedings of the 2000 Design, 2000
Synthesis of application-specific memories for power optimization in embedded systems.
Proceedings of the 37th Conference on Design Automation, 2000
1999
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers.
ACM Trans. Design Autom. Electr. Syst., 1999
Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting.
IEEE Trans. Computers, 1999
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Low-power implementation of a residue-to-weighted conversion unit for a 5-moduli RNS.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses.
Proceedings of the 36th Conference on Design Automation, 1999
Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms.
Proceedings of the 36th Conference on Design Automation, 1999
1998
IEEE Trans. Very Large Scale Integr. Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 35th Conference on Design Automation, 1998
Proceedings of the 35th Conference on Design Automation, 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997
Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems.
Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997
Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks.
Proceedings of the European Design and Test Conference, 1997
Telescopic Units: Increasing the Average Throughput of Pipelined Designs by Adaptive Latency Control.
Proceedings of the 34st Conference on Design Automation, 1997
1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Automatic state space decomposition for approximate FSM traversal based on circuit analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Symbolic computation of logic implications for technology-dependent low-power synthesis.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996
Proceedings of the conference on European design automation, 1996
Proceedings of the 33st Conference on Design Automation, 1996
1995
Using connectivity and spectral methods to characterize the structure of sequential logic circuits.
Microprocess. Microprogramming, 1995
Using symbolic Rademacher-Walsh spectral transforms to evaluate the correlation between Boolean functions.
Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995
Estimating worst-case power consumption of CMOS circuits modeled as symbolic neural networks.
Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995
Predicting the functional complexity of combinational circuits by symbolic spectral analysis of Boolean functions.
Proceedings of the Proceedings EURO-DAC'95, 1995
Proceedings of the 32st Conference on Design Automation, 1995
1994
A Structural Approach to State Space Decomposition for Approximate Reachability Analysis.
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the 31st Conference on Design Automation, 1994
1993
Proceedings of the Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1993
Proceedings of the Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1993
Proceedings of the 30th Design Automation Conference. Dallas, 1993
1992
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
1991
Proceedings of the First Great Lakes Symposium on VLSI, 1991