Béla Fehér

According to our database, Béla Fehér authored at least 14 papers between 1993 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2011

Molecular Docking on FPGA and GPU Platforms.

Imre Pechan, Béla Fehér

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2009

LOGSYS: A simple tool for complex student projects.

Béla Fehér, Tamás Raikovich, György Dancsi, Péter Laczkó

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2009

2008

High-Performance Timing-Driven Rank Filter.

Péter Szántó, Gábor Szedö, Béla Fehér

VLSI Design, 2008

2006

Acoustic Source Localization Fusing Sparse Direction of Arrival Estimates.

Ákos Lédeczi, Gergely Kis, Béla Fehér, Péter Völgyesi, György Balogh

Proceedings of the 4th International Workshop on Intelligent Solutions in Embedded Systems, 2006

2005

Heuristic Automation for Decluttering Tactical Displays.

Mark F. St. John, Harvey S. Smallman, Daniel I. Manes, Béla Fehér, Jeffrey G. Morrison

Hum. Factors, 2005

2004

High performance visibility testing with screen segmentation.

Péter Szántó, Béla Fehér

Proceedings of the 2nd Workshop on Embedded Systems for Real-Time Multimedia, 2004

2003

Using run-time reconfiguration for fault injection applications.

Lörinc Antoni, Régis Leveugle, Béla Fehér

IEEE Trans. Instrum. Meas., 2003

3D rendering using FPGAs.

Péter Szántó, Béla Fehér

Proceedings of the IFIP VLSI-SoC 2003, 2003

Dependability Analysis: A New Application for Run-Time Reconfiguration.

Régis Leveugle, Lörinc Antoni, Béla Fehér

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2000

A Full-Parallel Digital Implementation for Pre-Trained NNs.

Tamás Szabó, Lörinc Antoni, Gábor Horváth, Béla Fehér

Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes.

Lörinc Antoni, Régis Leveugle, Béla Fehér

Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1998

Neural network implementation using distributed arithmetic.

Tamás Szabó, Béla Fehér, Gábor Horváth

Proceedings of the Knowledge-Based Intelligent Electronic Systems, 1998

Cost Effective 2×2 Inner Product Processors.

Béla Fehér, Gábor Szedö

Proceedings of the Field-Programmable Logic and Applications, 1998

1993

Efficient synthesis of distributed vector multipliers.

Béla Fehér

Microprocess. Microprogramming, 1993