Bhaskara Rao Jammu

According to our database, Bhaskara Rao Jammu authored at least 8 papers between 2021 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Hardware efficient circuit for low error logarithmic converter.

Bhaskara Rao Jammu, L. Guna Sekhar Sai Harsha, Nalini Bodasingi, Sreehari Veeramachaneni, Noor Mohammad S.

J. Comput. Methods Sci. Eng., 2022

Automatic diagnosis of pneumonia using backward elimination method based SVM and its hardware implementation.

Nalini Bodasingi, Balaji Narayanam, Bhaskara Rao Jammu

Int. J. Imaging Syst. Technol., 2022

A New Approximate 4-2 Compressor using Merged Sum and Carry.

Chinthalgiri Jyothi, Saranya Karunamurthi, Bhaskara Rao Jammu, Sreehari Veeramachaneni, Sk. Noor Mahammad

J. Electron. Test., 2022

A Low Error, Hardware Efficient Logarithmic Multiplier.

L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Nalini Bodasingi, Sreehari Veeramachaneni, Noor Mohammad S.

Circuits Syst. Signal Process., 2022

2021

Hardware-efficient approximate logarithmic division with improved accuracy.

Chitlu Subhasri, Bhaskara Rao Jammu, L. Guna Sekhar Sai Harsha, Nalini Bodasingi, Visweswara Rao Samoju

Int. J. Circuit Theory Appl., 2021

A low-error, memory-based fast binary antilogarithmic converter.

L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Visweswara Rao Samoju, Sreehari Veeramachaneni, Noor Mohammad S.

Int. J. Circuit Theory Appl., 2021

Energy Efficient Approximate Multiplier Design for Image/Video Processing Applications.

L. Hemanth Krishna, J. Bhaskara Rao, Ayesha Sk, Sreehari Veeramachaneni, Sk. Noor Mahammad

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

Energy Efficient Approximate 4: 2 Compressors for Error Tolerant Applications.

L. Hemanth Krishna, J. Bhaskara Rao, Ayesha Sk, Sreehari Veeramachaneni, S. K. Noor Mahammad

Proceedings of the 28th IEEE International Conference on Electronics, 2021