Sk. Noor Mahammad

J. Supercomput., 2022

Low power, high speed approximate multiplier for error resilient applications.

[BibT_eX]

[DOI]

S. Skandha Deepsita

Integr., 2022

A New Approximate 4-2 Compressor using Merged Sum and Carry.

[BibT_eX]

[DOI]

Chinthalgiri Jyothi

Saranya Karunamurthi

Bhaskara Rao Jammu

J. Electron. Test., 2022

Self Healing Controllers to Mitigate SEU in the Control Path of FPGA Based System: A Complete Intrinsic Evolutionary Approach.

[BibT_eX]

[DOI]

S. Deepanjali

J. Electron. Test., 2022

Logic Locking Designs at Transistor Level for Full Adders.

[BibT_eX]

[DOI]

Sandeep Kolla

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Fault Tolerant Technique for Processor Control Path to Mitigate SEUs in FPGA.

[BibT_eX]

[DOI]

B. S. Chandrasekhar

S. Deepanjali

S. M. Srinivasavarma Vegesna

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021

A TCAM-based Caching Architecture Framework for Packet Classification.

[BibT_eX]

[DOI]

Shiv Vidhyut

ACM Trans. Embed. Comput. Syst., 2021

Efficient design of 15: 4 counter using a novel 5: 3 counter for high-speed multiplication.

[BibT_eX]

[DOI]

L. Hemanth Krishna

Neeharika M.

Vishvanath Janjirala

IET Comput. Digit. Tech., 2021

Energy efficient signed and unsigned radix 16 booth multiplier design.

[BibT_eX]

[DOI]

Y. Mounica

K. Naresh Kumar

Comput. Electr. Eng., 2021

Energy Efficient and Multiplierless Approximate Integer DCT Implementation for HEVC.

[BibT_eX]

[DOI]

S. Skandha Deepsita

Kuchipudi Divya

Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

Energy Efficient Approximate Multiplier Design for Image/Video Processing Applications.

[BibT_eX]

[DOI]

L. Hemanth Krishna

J. Bhaskara Rao

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

Design and Analysis of Obfuscated Full Adders.

[BibT_eX]

[DOI]

Sandeep Kolla

Proceedings of the International Conference on Microelectronics, 2021

Energy Efficient Approximate 4: 2 Compressors for Error Tolerant Applications.

[BibT_eX]

[DOI]

L. Hemanth Krishna

J. Bhaskara Rao

Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020

An Approach to Place Sink Node in a Wireless Sensor Network (WSN).

[BibT_eX]

[DOI]

Wirel. Pers. Commun., 2020

Efficient implementation of mixed-precision multiply-accumulator unit for AI algorithms.

[BibT_eX]

[DOI]

Chandana Mounica

Sagar Krishna

Int. J. Circuit Theory Appl., 2020

2019

Discrete Orthogonal Multi-transform on Chip (DOMoC).

[BibT_eX]

[DOI]

S. M. Srinivasavarma Vegesna

J. Signal Process. Syst., 2019

A Novel Rule Mapping on TCAM for Power Efficient Packet Classification.

[BibT_eX]

[DOI]

Ashok Chakravarthy Nara

ACM Trans. Design Autom. Electr. Syst., 2019

2018

An Efficient VLSI Architecture for Convolution Based DWT Using MAC.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017

A Novel Range Matching Architecture for Packet Classification Without Rule Expansion.

[BibT_eX]

[DOI]

Shanmugakumar Murugesan

ACM Trans. Design Autom. Electr. Syst., 2017

High Performance Integer DCT Architectures for HEVC.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

2016

High speed multiplexer design using tree based decomposition algorithm.

[BibT_eX]

[DOI]

Microelectron. J., 2016

An efficient VLSI architecture for lifting based 1D/2D discrete wavelet transform.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2016

Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform.

[BibT_eX]

[DOI]

Integr., 2016

An Efficient VLSI Architecture for Discrete Hadamard Transform.

[BibT_eX]

[DOI]

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

2015

Configurable Folded IIR Filter Design.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2015

Genetic annealing with efficient strategies to improve the performance for the NP-hard and routing problems.

[BibT_eX]

[DOI]

Rajesh Eswarawaka

B. Eswara Reddy

J. Exp. Theor. Artif. Intell., 2015

A Novel Ternary Content-Addressable Memory (TCAM) Design Using Reversible Logic.

[BibT_eX]

[DOI]

S. Dinesh Kumar

Proceedings of the 28th International Conference on VLSI Design, 2015

A novel adiabatic SRAM cell implementation using split level charge recovery logic.

[BibT_eX]

[DOI]

S. Dinesh Kumar

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2014

An Efficient Hardware-Based Higher Radix Floating Point MAC Design.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2014

Efficient IP lookup using hybrid trie-based partitioning of TCAM-based open flow switches.

[BibT_eX]

[DOI]

Photonic Netw. Commun., 2014

Hybrid Memetic Algorithm for FPGA Placement and Routing Using Parallel Genetic Tunneling.

[BibT_eX]

[DOI]

Rajesh Eswarawaka

B. Eswara Reddy

Proceedings of Fourth International Conference on Soft Computing for Problem Solving, 2014

Memory Based Multiplier Design in Custom and FPGA Implementation.

[BibT_eX]

[DOI]

Proceedings of the Advances in Intelligent Informatics, 2014

2013

Constructing scalable hierarchical switched openflow network using adaptive replacement of flow table management.

[BibT_eX]

[DOI]

S. Rahul Sharma

Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2013

Novel approach to secure channel using C-SCAN and microcontroller in openflow.

[BibT_eX]

[DOI]

Biraja Nalini Rout

Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2013

Hybrid trie based partitioning of TCAM based openflow switches.

[BibT_eX]

[DOI]

Manas Kumar

Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2013

Minimization of flow table for TCAM based openflow switches by virtual compression approach.

[BibT_eX]

[DOI]

Manas Kumar

Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2013

2011

Hardware based genetic evolution of self-adaptive arbitrary response FIR filters.

[BibT_eX]

[DOI]

Shoaib Mohammed

V. Kamakoti

Appl. Soft Comput., 2011

2010

Constructing Online Testable Circuits Using Reversible Logic.

[BibT_eX]

[DOI]