Bhuvana B. P.

According to our database, Bhuvana B. P. authored at least 5 papers between 2018 and 2020.

Collaborative distances:

• Dijkstra number of seven.
• Erdős number of six.

2020

Analysis of FinFET-Based Adiabatic Circuits for the Design of Arithmetic Structures.

Bhuvana B. P., V. S. Kanchana Bhaaskaran

J. Circuits Syst. Comput., 2020

Design and Analysis of Low Power and High Speed FinFET based Hybrid Full Adder/Subtractor Circuit (FHAS).

E. Ramkumar, D. Gracin, P. Rajkamal, Bhuvana B. P., V. S. Kanchana Bhaaskaran

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020

2019

Design of FinFET-based Energy Efficient Pass-Transistor Adiabatic Logic for ultra-low power applications.

Bhuvana B. P., V. S. Kanchana Bhaaskaran

Microelectron. J., 2019

Design and Analysis of FinFET Based CSCPAL Low Power Adder.

Jayashree K. G, Lois Priscilla S, Bhuvana B. P., V. S. Kanchana Bhaaskaran

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2018

Positive Feedback Symmetric Adiabatic Logic Against Differential Power Attack.

Bhuvana B. P., V. S. Kanchana Bhaaskaran

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018