Bjørnar Hernes

According to our database1, Bjørnar Hernes authored at least 9 papers between 2001 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
A 500 MS/s 76dB SNDR continuous time delta sigma modulator with 10MHz signal bandwidth in 0.18μm CMOS.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2007
A 92.5mW 205MS/s 10b Pipeline IF ADC Implemented in 1.2V/3.3V 0.13μm CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
Quantizer Nonoverload Criteria in Sigma-Delta Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005
Distortion in single-, two- and three-stage amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A cost-efficient high-speed 12-bit pipeline ADC in 0.18-μm digital CMOS.
IEEE J. Solid State Circuits, 2005

2004
A 97mW 110MS/s 12b pipeline ADC implemented in 0.18μm digital CMOS.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

A 97mW 110MS/s 12b Pipeline ADC Implemented in 0.18mum Digital CMOS.
Proceedings of the 2004 Design, 2004

2001
A -80 dB HD3 opamp in 3.3 V CMOS technology using tail current compensation.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A mixed-signal, functional level simulation framework based on SystemC for system-on-a-chip applications.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001


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