Willy M. C. Sansen

Affiliations:
  • Catholic University of Leuven, Belgium


According to our database1, Willy M. C. Sansen authored at least 124 papers between 1979 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1995, "For contributions to the systematic design of analog integrated circuits.".

Timeline

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Links

Online presence:

On csauthors.net:

Bibliography

2017
The noise performance of CMOS Miller operational transconductance amplifiers with embedded current-buffer frequency compensation.
Int. J. Circuit Theory Appl., 2017

2015
1.3 Analog CMOS from 5 micrometer to 5 nanometer.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
SiGe BiCMOS technology and circuits for active safety systems.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

SC1: Biomedical and sensor interface circuits.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
RF blocks for wireless transceivers.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Analog design procedures for channel lengths down to 20 nm.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

Keynote lectures.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012
Low-power analog signal processing.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Impedance Adapting Compensation for Low-Power Multistage Amplifiers.
IEEE J. Solid State Circuits, 2011

2010
Identifying the Bottlenecks to the RF Performance of FinFETs.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

Signal and power integrity for SoCs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
Erratum to "A 1-V 140-μW 88-dB Audio Sigma-Delta Modulator in 90-nm CMOS".
IEEE J. Solid State Circuits, 2009

An 8-Bit Flash Analog-to-Digital Converter in Standard CMOS Technology Functional From 4.2 K to 300 K.
IEEE J. Solid State Circuits, 2009

Analog IC Design in Nanometer CMOS Technologies.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2008
Retraction of Papers With Falsified Information.
IEEE J. Solid State Circuits, 2008

An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 K.
Proceedings of the ESSCIRC 2008, 2008

2007
A Design-Optimized Continuous-Time Delta-Sigma ADC for WLAN Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A Cryogenic ADC operating Down to 4.2K.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

FinFET technology for analog and RF circuits.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Continuous-Time Delta-Sigma Modulator for 802.11a/b/g WLAN Implemented with a Hierarchical Bottom-up Optimization Methodology.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard.
Proceedings of the 43rd Design Automation Conference, 2006

2005
Distortion in single-, two- and three-stage amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Transconductance with capacitances feedback compensation for multistage amplifiers.
IEEE J. Solid State Circuits, 2005

2004
Efficient analysis of slow-varying oscillator dynamics.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A gradient-error and edge-effect tolerant switching scheme for a high-accuracy DAC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS.
IEEE J. Solid State Circuits, 2004

AC boosting compensation scheme for low-power multistage amplifiers.
IEEE J. Solid State Circuits, 2004

2003
PeopleMover: an example of interdisciplinary project-based education in electrical engineering.
IEEE Trans. Educ., 2003

Behavioral modeling of (coupled) harmonic oscillators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

An analytic Volterra-series-based model for a MEMS variable capacitor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

A 136-μW/channel autonomous strain-gauge datalogger.
IEEE J. Solid State Circuits, 2003

Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies.
IEEE J. Solid State Circuits, 2003

A Generalized Method for Computing Oscillator Phase Noise Spectra.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Modelling impact of digital substrate noise on embedded regenerative comparators.
Proceedings of the ESSCIRC 2003, 2003

A 0.8-V, 8-μW, CMOS OTA with 50-dB gain and 1.2-MHz GBW in 18-pF load.
Proceedings of the ESSCIRC 2003, 2003

Three stage amplifier frequency compensation.
Proceedings of the ESSCIRC 2003, 2003

A linear high voltage charge pump for MEMs applications in 0.18μm CMOS technology.
Proceedings of the ESSCIRC 2003, 2003

Time-Varying, Frequency-Domain Modeling and Analysis of Phase-Locked Loops with Sampling Phase-Frequency Detectors.
Proceedings of the 2003 Design, 2003

Generalized Posynomial Performance Modeling.
Proceedings of the 2003 Design, 2003

2002
Symbolic modeling of periodically time-varying systems usingharmonic transfer matrices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

CYCLONE: automated design and layout of RF LC-oscillators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

A layout synthesis methodology for array-type analog blocks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Circuit simplification for the symbolic analysis of analogintegrated circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

An easy-to-use mismatch model for the MOS transistor.
IEEE J. Solid State Circuits, 2002

Regression criteria and their application in different modeling cases.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

On the difference between two widely publicized methods for analyzing oscillator phase behavior.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Constructing Symbolic Models for the Input/Output Behavior of Periodically Time-Varying Systems Using Harmonic Transfer Matrices.
Proceedings of the 2002 Design, 2002

A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics.
Proceedings of the 2002 Design, 2002

An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits.
Proceedings of the 39th Design Automation Conference, 2002

Nested feed-forward Gm-stage and ing resistor plus nested-Miller compensation for multistage amplifiers.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
AMGIE-A synthesis environment for CMOS analog integrated circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

A CMOS multiparameter biochemical microsensor with temperature control and signal interfacing.
IEEE J. Solid State Circuits, 2001

A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter.
IEEE J. Solid State Circuits, 2001

A Layout-Aware Synthesis Methodology for RF Circuits.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Efficient time-domain simulation of telecom frontends using a complex damped exponential signal model.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

A 40 μA/channel compensated 18-channel strain gauge measurement system for stress monitoring in dental implants.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

A low power, 10-bit CMOS D/A converter for high speed applications.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
A high-performance multibit ΔΣ CMOS ADC.
IEEE J. Solid State Circuits, 2000

An accurate statistical yield model for CMOS current-steering D/A converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

The extraction of transistor mismatch parameters: the CMOS current-steering D/A converter as a test structure.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

CYCLONE: automated design and layout of RF LC-oscillators.
Proceedings of the 37th Conference on Design Automation, 2000

Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter.
Proceedings of the 37th Conference on Design Automation, 2000

A 12-bit 12.5 MS/s multi-bit ΔΣ CMOS ADC.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999
A 14-bit intrinsic accuracy Q<sup>2</sup> random walk CMOS DAC.
IEEE J. Solid State Circuits, 1999

A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications.
IEEE J. Solid State Circuits, 1999

Statistical behavioral modeling for A/D-converters.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

BANDIT: embedding analog-to-digital converters on digital telecom ASICs.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

SFDR-bandwidth limitations for high speed high resolution current steering CMOS D/A converters.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Theory of PLL fractional-N frequency synthesizers.
Wirel. Networks, 1998

Probabilistic fault detection and the selection of measurements for analog integrated circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range.
IEEE J. Solid State Circuits, 1998

A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technology.
IEEE J. Solid State Circuits, 1998

A 12-bit intrinsic accuracy high-speed CMOS DAC.
IEEE J. Solid State Circuits, 1998

High-Level Power Minimization of Analog Sensor Interface Architectures.
Integr. Comput. Aided Eng., 1998

Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Settling time analysis of third order systems.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A current steering architecture for 12-bit high-speed D/A converters.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon.
Proceedings of the 1998 Design, 1998

Behavioral model for D/A converters as VSI virtual components.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

Mondriaan: a tool for automated layout synthesis of array-type analog blocks.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

Transforming small-signal modeling into control system modeling.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

A 12 bit 200 MHz low glitch CMOS D/A converter.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1997
A 1.5-V-100-μW ΔΣ modulator with 12-b dynamic range using the switched-opamp technique.
IEEE J. Solid State Circuits, 1997

A rail-to-rail constant-g<sub>m</sub> low-voltage CMOS operational transconductance amplifier.
IEEE J. Solid State Circuits, 1997

A 50-MHz standard CMOS pulse equalizer for hard disk read channels.
IEEE J. Solid State Circuits, 1997

A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

High-level synthesis of analog sensor interface front-ends.
Proceedings of the European Design and Test Conference, 1997

1996

A low-voltage reduced-power constant-g<sub>m</sub> rail-to-rail fully differential CMOS op-amp.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies.
Proceedings of the 33st Conference on Design Automation, 1996

1995
A performance-driven placement tool for analog integrated circuits.
IEEE J. Solid State Circuits, July, 1995

Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits.
IEEE J. Solid State Circuits, March, 1995

An analogue module generator for mixed analogue/digital asic design.
Int. J. Circuit Theory Appl., 1995

Use of Symbolic Analysis in Analog Circuit Synthesis.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A flexible topology selection program as part of an analog synthesis system.
Proceedings of the 1995 European Design and Test Conference, 1995

Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits.
Proceedings of the 32st Conference on Design Automation, 1995

1994
A CMOS time to digital converter IC with 2 level analog CAM.
IEEE J. Solid State Circuits, September, 1994

A high-frequency and high-resolution fourth-order ΣΔ A/D converter in BiCMOS technology.
IEEE J. Solid State Circuits, August, 1994

Electrothermal simulation and design of integrated circuits.
IEEE J. Solid State Circuits, February, 1994

Symbolic analysis methods and applications for analog circuits: a tutorial overview.
Proc. IEEE, 1994

A Novel Method for the Fault Detection of Analog Integrated Circuits.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Pleasures, Perils and Pitfalls of Symbolic Analysis.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Fault detection and input stimulus determination for the testing of analog integrated circuits based on power-supply current monitoring.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

A Methodology for Analog Design Automation in Mixed-Signal ASICs.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1993
Low-voltage Analog CMOS Filter Design.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

High-performance CMOS continuous-time filters.
The Kluwer international series in engineering and computer science 223, Kluwer, ISBN: 978-0-7923-9339-9, 1993

Analog interfaces for digital signal processing systems.
The Kluwer international series in engineering and computer science 225, Kluwer, ISBN: 978-0-7923-9348-1, 1993

1991
Interactive symbolic distortion analysis of analogue integrated circuits.
Proceedings of the conference on European design automation, 1991

DONALD: a workbench for interactive design space exploration and sizing of analog circuits.
Proceedings of the conference on European design automation, 1991

Symbolic analysis for automated design of analog integrated circuits.
The Kluwer international series in engineering and computer science 137, Kluwer, ISBN: 978-0-7923-9161-6, 1991

Low-noise wide-band amplifiers in bipolar and CMOS technologies.
The Kluwer international series in engineering and computer science 117, Kluwer, ISBN: 978-0-7923-9096-1, 1991

1990
An intelligent design system for analogue integrated circuits.
Proceedings of the European Design Automation Conference, 1990

1989
Modeling of the MOS transistor for high frequency analog design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

1980
A line-expansion algorithm for the general routing problem with a guaranteed solution.
Proceedings of the 17th Design Automation Conference, 1980

1979
CALMOS: A portable software system for the automatic and interactive layout of MOS/LSI.
Proceedings of the 16th Design Automation Conference, 1979


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