Bo Fu

According to our database, Bo Fu authored at least 15 papers between 2006 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Adaptive Voltage Control for Energy-Efficient NoC Links.

Paul Ampadu, Bo Fu, David Wolpert, Qiaoyan Yu

Proceedings of the Low Power Networks-on-Chip., 2011

2010

Exploiting Parity Computation Latency for On-Chip Crosstalk Reduction.

Bo Fu, Paul Ampadu

IEEE Trans. Circuits Syst. II Express Briefs, 2010

Error control combining Hamming and product codes for energy efficient nanoscale on-chip interconnects.

Bo Fu, Paul Ampadu

IET Comput. Digit. Tech., 2010

Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design.

David Wolpert, Bo Fu, Paul Ampadu

Proceedings of the NOCS 2010, 2010

2009

An Area Efficient FFT/IFFT Processor for MIMO-OFDM WLAN 802.11n.

Bo Fu, Paul Ampadu

J. Signal Process. Syst., 2009

On Hamming Product Codes With Type-II Hybrid ARQ for On-Chip Interconnects.

Bo Fu, Paul Ampadu

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Lookahead-based adaptive voltage scheme for energy-efficient on-chip interconnect links.

Bo Fu, David Wolpert, Paul Ampadu

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects.

Bo Fu, Paul Ampadu

Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008

An Energy-Efficient Multiwire Error Control Scheme for Reliable On-Chip Interconnects Using Hamming Product Codes.

Bo Fu, Paul Ampadu

VLSI Design, 2008

A multi-wire error correction scheme for reliable and energy efficient SOC links using hamming product codes.

Bo Fu, Paul Ampadu

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

A Dual-Mode Hybrid ARQ Scheme for Energy Efficient On-Chip Interconnects.

Bo Fu, Paul Ampadu

Proceedings of the Nano-Net - Third International ICST Conference, 2008

2007

Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency.

Bo Fu, Paul Ampadu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Techniques for robust energy efficient subthreshold domino CMOS circuits.

Bo Fu, Paul Ampadu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Leakage Power Minimization of Nanoscale CMOS Circuits via Non-Critical Path Transistor Sizing.

Bo Fu, Paul Ampadu

Proceedings of the 13th IEEE International Conference on Electronics, 2006

Energy-delay minimization in nanoscale domino logic.

Bo Fu, Qiaoyan Yu, Paul Ampadu

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006