Paul Ampadu

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

A Scalable DC/DC Converter with Fast Load Transient Response and Security Improvement.

[BibT_eX]

[DOI]

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

A Scalable Integrated DC/DC Converter with Enhanced Load Transient Response and Security for Emerging SoC Applications.

[BibT_eX]

[DOI]

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

A Scalable Single-Input-Multiple-Output DC/DC Converter with Enhanced Load Transient Response and Security for Low-Power SoCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Fault intensity map analysis with neural network key distinguisher.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2021

Distributed On-Chip Power Supply for Security Enhancement in Multicore NoC.

[BibT_eX]

[DOI]

Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

2020

SCAUL: Power Side-Channel Analysis With Unsupervised Learning.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

SCARL: Side-Channel Analysis with Reinforcement Learning on the Ascon Authenticated Cipher.

[BibT_eX]

[DOI]

CoRR, 2020

RS-Mask: Random Space Masking as an Integrated Countermeasure against Power and Fault Analysis.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

2019

Energy-efficient and high-performance NoC architecture and mapping solution for deep neural networks.

[BibT_eX]

[DOI]

Md Farhadur Reza

Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019

Optimal SAT-based Minimum Adder Synthesis of Linear Transformations.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Self-decompressing FPGA Bitstreams.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Novel Single-Input-Multiple-Output DC/DC Converter for Distributed Power Management in Many-Core Systems.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Statistical Fault Analysis Methodology for the Ascon Authenticated Cipher.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

Enabling Approximate Storage through Lossy Media Data Compression.

[BibT_eX]

[DOI]

Brian Worek

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Approximate Communication Strategies for Energy-Efficient and High Performance NoC: Opportunities and Challenges.

[BibT_eX]

[DOI]

Md Farhadur Reza

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Approximate Memory with Approximate DCT.

[BibT_eX]

[DOI]

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

An Asymmetric Dual Output On-Chip DC-DC Converter for Dynamic Workloads.

[BibT_eX]

[DOI]

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

FIMA: Fault Intensity Map Analysis.

[BibT_eX]

[DOI]

Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2019

2018

An Energy-Efficient NoC Router with Adaptive Fault-Tolerance Using Channel Slicing and On-Demand TMR.

[BibT_eX]

[DOI]

Mo Yang

IEEE Trans. Emerg. Top. Comput., 2018

Reconfigurable Clock Generator with Wide Frequency Range and Single-Cycle Phase and Frequency Switching.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017

Improving Scalability in Thermally Resilient Hybrid Photonic-Electronic NoCs.

[BibT_eX]

[DOI]

Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017

2016

Thermal-Aware Adaptive Fault-Tolerant Routing for Hybrid Photonic-Electronic NoC.

[BibT_eX]

[DOI]

Mo Yang

Proceedings of the 9th International Workshop on Network on Chip Architectures, 2016

Energy-efficient power trimming for reliable nanophotonic NoC microring resonators.

[BibT_eX]

[DOI]

Mo Yang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Energy-efficient NoC with variable channel width.

[BibT_eX]

[DOI]

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A compact low-power eDRAM-based NoC buffer.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2013

Addressing network-on-chip router transient errors with inherent information redundancy.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2013

Reliable ultra-low voltage cache with variation-tolerance.

[BibT_eX]

[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Variation-tolerant cache by two-layer error control codes.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Breaking the energy barrier in fault-tolerant caches for multicore systems.

[BibT_eX]

[DOI]

Vladimir Stojanovic

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Dual-Layer Adaptive Error Control for Network-on-Chip Links.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2012

Reliable Ultra-Low-Voltage Cache Design for Many-Core Systems.

[BibT_eX]

[DOI]

Vladimir Stojanovic

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Exploiting Programmable Temperature Compensation Devices to Manage Temperature-Induced Delay Uncertainty.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Transient and Permanent Error Control for High-End Multiprocessor Systems-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

Fine-grained splitting methods to address permanent errors in Network-on-Chip links.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Transient error management for partially adaptive router in network-on-chip (NoC).

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Hybrid OTDM and WDM for multicore optical communication.

[BibT_eX]

[DOI]

Abdelsalam A. Aboketaf

Proceedings of the 2012 International Green Computing Conference, 2012

2011

A Dual-Layer Method for Transient and Permanent Error Co-Management in NoC Links.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2011

A Sensor System to Detect Positive and Negative Current-Temperature Dependences.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2011

A comprehensive Networks-on-Chip simulator for error control explorations.

[BibT_eX]

[DOI]

Proceedings of the NOCS 2011, 2011

Exploiting inherent information redundancy to manage transient errors in NoC routing arbitration.

[BibT_eX]

[DOI]

Proceedings of the NOCS 2011, 2011

Adaptive Voltage Control for Energy-Efficient NoC Links.

[BibT_eX]

[DOI]

Proceedings of the Low Power Networks-on-Chip., 2011

2010

Self-Adaptive System for Addressing Permanent Errors in On-Chip Interconnects.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2010

Exploiting Parity Computation Latency for On-Chip Crosstalk Reduction.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2010

A Flexible Parallel Simulator for Networks-on-Chip With Error Control.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Error control combining Hamming and product codes for energy efficient nanoscale on-chip interconnects.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2010

Transient and Permanent Error Co-management Method for Reliable Networks-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the NOCS 2010, 2010

Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design.

[BibT_eX]

[DOI]

Proceedings of the NOCS 2010, 2010

Error control integration scheme for reliable NoC.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

An Area Efficient FFT/IFFT Processor for MIMO-OFDM WLAN 802.11n.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2009

On Hamming Product Codes With Type-II Hybrid ARQ for On-Chip Interconnects.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A simulator for ballistic nanostructures in a 2-D electron gas.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2009

Adaptive error control for nanometer scale network-on-chip links.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2009

Lookahead-based adaptive voltage scheme for energy-efficient on-chip interconnect links.

[BibT_eX]

[DOI]

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Ballistic Deflection Transistors and the Emerging Nanoscale Era.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Dual-Layer Cooperative Error Control for Reliable Nanoscale Networks-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

A Sensor to Detect Normal or Reverse Temperature Dependence in Nanoscale CMOS Circuits.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008

An Energy-Efficient Multiwire Error Control Scheme for Reliable On-Chip Interconnects Using Hamming Product Codes.

[BibT_eX]

[DOI]

VLSI Design, 2008

Adaptive Delay Correction for Runtime Variation in Dynamic voltage Scaling Systems.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2008

Configurable error correction for multi-wire errors in switch-to-switch SOC links.

[BibT_eX]

[DOI]

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

A multi-wire error correction scheme for reliable and energy efficient SOC links using hamming product codes.

[BibT_eX]

[DOI]

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Normal and Reverse Temperature Dependence in Variation-Tolerant Nanoscale Systems with High-k Dielectrics and Metal Gates.

[BibT_eX]

[DOI]

Proceedings of the Nano-Net - Third International ICST Conference, 2008

A Dual-Mode Hybrid ARQ Scheme for Energy Efficient On-Chip Interconnects.

[BibT_eX]

[DOI]

Proceedings of the Nano-Net - Third International ICST Conference, 2008

Adaptive error control for reliable systems-on-chip.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Adaptive Error Control for NoC Switch-to-Switch Links in a Variable Noise Environment.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

A Low-Power Safety Mode for Variation Tolerant Systems-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2007

A ballistic nanoelectronic device simulator.

[BibT_eX]

[DOI]

Dennis Huo

Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007

Temperature-Robust Performance Yield through Supply Voltage Selection.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Techniques for robust energy efficient subthreshold domino CMOS circuits.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Ultra-low voltage VLSI: are we there yet?

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Cell Ratio Bounds for Reliable SRAM Operation.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

Leakage Power Minimization of Nanoscale CMOS Circuits via Non-Critical Path Transistor Sizing.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

Energy-delay minimization in nanoscale domino logic.

[BibT_eX]

[DOI]