Byoungchan Oh

Orcid: 0000-0001-9612-2501

According to our database1, Byoungchan Oh authored at least 5 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Rethinking DRAM's Page Mode With STT-MRAM.
IEEE Trans. Computers, May, 2023

2019
SMART: STT-MRAM architecture for smart activation and sensing.
Proceedings of the International Symposium on Memory Systems, 2019

2018
A load balancing technique for memory channels.
Proceedings of the International Symposium on Memory Systems, 2018

2016
Checkpointing Exascale Memory Systems with Existing Memory Technologies.
Proceedings of the Second International Symposium on Memory Systems, 2016

Enhancing DRAM Self-Refresh for Idle Power Reduction.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016


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