Cagdas Akturan

According to our database1, Cagdas Akturan authored at least 5 papers between 1999 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2002
RS-FDRA: A register-sensitive software pipelining algorithm for embedded VLIW processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

An Effective Software Pipelining Algorithm for Clustered Embedded VLIW Processors.
Des. Autom. Embed. Syst., 2002

2001
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

2000
FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors.
Proceedings of the 13th International Symposium on System Synthesis, 2000

1999
Resource constrained dataflow retiming heuristics for VLIW ASIPs.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999


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