Carsten Bieser

According to our database, Carsten Bieser authored at least 7 papers between 2003 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Konzept einer bibliotheksbasiert konfigurierbaren Hardware-Testeinrichtung für eingebettete elektronische Systeme.

Carsten Bieser

PhD thesis, 2007

2006

Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs.

Carsten Bieser, Klaus D. Müller-Glaser

Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006

A Novel Partial Bitstream Merging Methodology Accelerating Xilinx Virtex-II FPGA Based RP System Setup.

Carsten Bieser, Martin Bahlinger, Matthias Heinz, Christian Stops, Klaus D. Müller-Glaser

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

A Novel FPGA Design Acceleration Methodology Supported by a Unique RP Platform for Fast and Easy System Develpoment.

Carsten Bieser

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005

COMPASS - A Novel Concept of a Reconfigurable Platform for Automotive System Development and Test.

Carsten Bieser, Klaus D. Müller-Glaser

Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

Hardware/Software Co-Training Lab: From VHDL Bit-Level Coding up to CASE-Tool Based System Modeling.

Carsten Bieser, Klaus D. Müller-Glaser, Jürgen Becker

Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005

2003

Hardware/Software Co-Training by FPGA/ASIC Synthesis and programming of a RISC Microprocessor-Core.

Jens E. Becker, Carsten Bieser, Alexander Thomas, Klaus D. Müller-Glaser, Jürgen Becker

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003