Alexander Thomas
According to our database1,
Alexander Thomas
authored at least 28 papers
between 2003 and 2022.
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Bibliography
2022
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022
2016
Proceedings of the 12th IEEE International Conference on e-Science, 2016
2015
Dynamisch und partiell rekonfigurierbare Hardwarearchitektur mit adaptivem hardwaregestützten Routing zur Laufzeit.
PhD thesis, 2015
2012
HoneyComb: An Application-Driven Online Adaptive Reconfigurable Hardware Architecture.
Int. J. Reconfigurable Comput., 2012
2011
HoneyComb: A multi-grained dynamically reconfigurable runtime adaptive hardware architecture.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
2010
Development and Synthesis of Adaptive Multi-grained Reconfigurable Hardware Architecture for Dynamic Function Patterns.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
Int. J. Robotics Res., 2009
Comput. Vis. Image Underst., 2009
2008
Proceedings of the Robotics: Science and Systems IV, 2008
2007
New Adaptive Multi-grained Hardware Architecture for Processing of Dynamic Function Patterns (Neue adaptive multi-granulare Hardwarearchitektur).
it Inf. Technol., 2007
Proceedings of the IEEE 11th International Conference on Computer Vision, 2007
2006
Proceedings of the 2006 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR 2006), 2006
2005
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005
Multi-Grained Reconfigurable Datapath Structures for Online-Adaptive Reconfigurable Hardware Architectures.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Design of a Dynamic Reconfigurable Multi-Grained Hardware Architecture with Adaptive Runtime Routing.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2004
Adaptive DMA-based I/O interfaces for data stream handling in multi-grained reconfigurable hardware architectures.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Formale Verifikation eines Sonet/SDH Framers.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004
Dynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures.
Proceedings of the Field Programmable Logic and Application, 2004
Aufbau- und Strukturkonzepte einer adaptive multigranularen rekonfigurierbaren Hardwarearchitektur.
Proceedings of the ARCS 2004, 2004
2003
Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath.
Proceedings of the VLSI-SOC: From Systems to Chips, 2003
Datapath and Compiler Integration of Coarse-grain Reconfigurable XPP-Arrays into Pipelined RISC Processors.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Efficient Processor Instruction Set Extension by Asynchronous Reconfigurable Datapath Integration.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003
Hardware/Software Co-Training by FPGA/ASIC Synthesis and programming of a RISC Microprocessor-Core.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
An Industrial/Academic Configurable System-on-Chip Project (CSoC): Coarse-Grain XXP-/Leon-Based Architecture Integration.
Proceedings of the 2003 Design, 2003