Chandan Kumar N. S

According to our database, Chandan Kumar N. S authored at least 3 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

BM-HPR Mul: Error Tolerant Hardware Efficient Booth Modified High Precision Redundant Multiplier.

Chandan Kumar N. S, Yerasi Manoj Reddy, Madhav Rao

Proceedings of the 27th International Symposium on Quality Electronic Design, 2026

Hardware Software Co-Optimization for RISC-V Based High-Performance Hyperdimensional Computing Architectures.

Priyanka Agarwal, Arun M, Chandan Kumar N. S, Shrinidhi S. Rao, Madhav Rao

Proceedings of the 27th International Symposium on Quality Electronic Design, 2026

2025

Hardware Efficient Multiplier Design Using an Optimal Mix of Approximate Booth Encodings.

Chandan Kumar N. S, Bhavana S, Ajitesh Kumar Singh, Madhav Rao

Proceedings of the 43rd IEEE International Conference on Computer Design, 2025