Charlie Brej

According to our database1, Charlie Brej authored at least 4 papers between 2005 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
Wagging Logic: Implicit Parallelism Extraction Using Asynchronous Methodologies.
Proceedings of the 10th International Conference on Application of Concurrency to System Design, 2010

2009
Forward and backward guarding in early output logic.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

Self-timed full adder designs based on hybrid input encoding.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2005
A Quasi-Delay-Insensitive Method to Overcome Transistor Variation.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005


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