Chenlin Ma

Orcid: 0000-0002-0497-123X

According to our database1, Chenlin Ma authored at least 25 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Rapper: A Parameter-Aware Repair-in-Memory Accelerator for Blockchain Storage Platform.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023
Meta-Block: Exploiting Cross-Layer and Direct Storage Access for Decentralized Blockchain Storage Systems.
IEEE Trans. Computers, July, 2023

Tidal-Tree-Mem: Toward Read-Intensive Key-Value Stores With Tidal Structure Based on LSM-Tree.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

Lift: Exploiting Hybrid Stacked Memory for Energy-Efficient Processing of Graph Convolutional Networks.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Tailored Hidden Markov Model: A Tailored Hidden Markov Model Optimized for Cellular-Based Map Matching.
IEEE Trans. Ind. Electron., 2022

MAID-Q: Minimizing Tail Latency in Embedded Flash With SMR Disk via -Learning Model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Rebirth-FTL: Lifetime Optimization via Approximate Storage for NAND Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

GCIM: Toward Efficient Processing of Graph Convolutional Networks in 3D-Stacked Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

MU-RMW: Minimizing Unnecessary RMW Operations in the Embedded Flash with SMR Disk.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Work-in-Progress: Lark: A Learned Secondary Index Toward LSM-tree for Resource-Constrained Embedded Storage Systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022

2021
Leveraging the Interplay of RAID and SSD for Lifetime Optimization of Flash-Based SSD RAID.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Tiler: An Autonomous Region-Based Scheme for SMR Storage.
IEEE Trans. Computers, 2021

2020
MNFTL: An Efficient Flash Translation Layer for MLC NAND Flash Memory.
ACM Trans. Design Autom. Electr. Syst., 2020

An Efficient Directory Entry Lookup Cache With Prefix-Awareness for Mobile Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

KFR: Optimal Cache Management with K-Framed Reclamation for Drive-Managed SMR Disks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
RMW-F: A Design of RMW-Free Cache Using Built-in NAND-Flash for SMR Storage.
ACM Trans. Embed. Comput. Syst., 2019

Alleviating Hot Data Write Back Effect for Shingled Magnetic Recording Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

FC: Built-in flash cache with fast cleaning for SMR storage systems.
J. Syst. Archit., 2019

Delay-based I/O request scheduling in SSDs.
J. Syst. Archit., 2019

Optimizing Cauchy Reed-Solomon Coding via ReRAM Crossbars in SSD-based RAID Systems.
Proceedings of the 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, 2019

FC: Built-in Flash-cache with fast cleaning for SMR Storage.
Proceedings of the 15th IEEE International Conference on Embedded Software and Systems, 2019

2018
Tiler: An Autonomous Region-Based Scheme with Fast Cleaning for SMR Storage.
Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018

2017
A Block-Level Log-Block Management Scheme for MLC NAND Flash Memory Storage Systems.
IEEE Trans. Computers, 2017

2016
NVMRA: utilizing NVM to improve the random write operations for NAND-flash-based mobile devices.
Softw. Pract. Exp., 2016

2014
Reference direction based immune clone algorithm for many-objective optimization.
Frontiers Comput. Sci., 2014


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