Zili Shao

According to our database1, Zili Shao authored at least 201 papers between 2002 and 2018.

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Bibliography

2018
A Novel ReRAM-Based Processing-in-Memory Architecture for Graph Traversal.
TOS, 2018

Emerging NVM: A Survey on Architectural Integration and Research Challenges.
ACM Trans. Design Autom. Electr. Syst., 2018

Optimally Removing Synchronization Overhead for CNNs in Three-Dimensional Neuromorphic Architecture.
IEEE Trans. Industrial Electronics, 2018

Multicore Mixed-Criticality Systems: Partitioned Scheduling and Utilization Bound.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018

A reliability enhanced video storage architecture in hybrid SLC/MLC NAND flash memory.
Journal of Systems Architecture - Embedded Systems Design, 2018

Optimizing RAID/SSD controllers with lifetime extension for flash-based SSD array.
Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, 2018

A Reliable Video Storage Architecture in Hybrid SLC/MLC Nand Flash.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

A peripheral circuit reuse structure integrated with a retimed data flow for low power RRAM crossbar-based CNN.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

SQLiteKV: An efficient LSM-tree-based SQLite-like database engine for mobile devices.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Data-Pattern-Aware Error Prevention Technique to Improve System Reliability.
IEEE Trans. VLSI Syst., 2017

Durable Address Translation in PCM-Based Flash Storage Systems.
IEEE Trans. Parallel Distrib. Syst., 2017

A Robust Algorithm for State-of-Charge Estimation With Gain Optimization.
IEEE Trans. Industrial Informatics, 2017

System-Level Design Optimization for Security-Critical Cyber-Physical-Social Systems.
ACM Trans. Embedded Comput. Syst., 2017

A Multi-Quadcopter Cooperative Cyber-Physical System for Timely Air Pollution Localization.
ACM Trans. Embedded Comput. Syst., 2017

Preserving Smart Sink-Location Privacy with Delay Guaranteed Routing Scheme for WSNs.
ACM Trans. Embedded Comput. Syst., 2017

vFlash: Virtualized Flash for Optimizing the I/O Performance in Mobile Devices.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Non-Volatile Memory Based Page Swapping for Building High-Performance Mobile Devices.
IEEE Trans. Computers, 2017

A Block-Level Log-Block Management Scheme for MLC NAND Flash Memory Storage Systems.
IEEE Trans. Computers, 2017

Heating Dispersal for Self-Healing NAND Flash Memory.
IEEE Trans. Computers, 2017

Virtual duplication and mapping prefetching for emerging storage primitives in NAND flash memory storage systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2017

A workload-aware flash translation layer enhancing performance and lifespan of TLC/SLC dual-mode flash memory in embedded systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2017

Fine grained, direct access file system support for storage class memory.
Journal of Systems Architecture - Embedded Systems Design, 2017

An energy-efficient encryption mechanism for NVM-based main memory in mobile systems.
Journal of Systems Architecture - Embedded Systems Design, 2017

Revisiting swapping in mobile systems with SwapBench.
Future Generation Comp. Syst., 2017

Utilizing NVDIMM to alleviate the I/O performance gap for big data workloads.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

Efficient and balanced charging of reconfigurable battery with variable power supply.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

On-line memorry defragmentation for NVM-based persistent heaps.
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

A novel ReRAM-based processing-in-memory architecture for graph computing.
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

DIDACache: A Deep Integration of Device and Application for Flash Based Key-Value Caching.
Proceedings of the 15th USENIX Conference on File and Storage Technologies, 2017

2016
Guest Editorial: Real-Time and Embedded Systems.
Signal Processing Systems, 2016

An Adaptive Demand-Based Caching Mechanism for NAND Flash Memory Storage Systems.
ACM Trans. Design Autom. Electr. Syst., 2016

A Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems.
IEEE Trans. Multi-Scale Computing Systems, 2016

Image-Content-Aware I/O Optimization for Mobile Virtualization.
ACM Trans. Embedded Comput. Syst., 2016

Morphable Resistive Memory Optimization for Mobile Virtualization.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

CPS Oriented Control Design for Networked Surveillance Robots With Multiple Physical Constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

An Endurance-Aware Metadata Allocation Strategy for MLC NAND Flash Memory Storage Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Distributed Multirobot Formation and Tracking Control in Cluttered Environments.
TAAS, 2016

NVMRA: utilizing NVM to improve the random write operations for NAND-flash-based mobile devices.
Softw., Pract. Exper., 2016

Non-Volatile memory (NVM) technologies.
Journal of Systems Architecture - Embedded Systems Design, 2016

Formation Control and Tracking for Co-operative Robots with Non-holonomic Constraints - Categories (2), (3).
Journal of Intelligent and Robotic Systems, 2016

RT-ROS: A real-time ROS architecture on multi-core processors.
Future Generation Comp. Syst., 2016

Energy-aware assignment and scheduling for hybrid main memory in embedded systems.
Computing, 2016

Bridging the I/O performance gap for big data workloads: A new NVDIMM-based approach.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Optimizing Flash-based Key-value Cache Systems.
Proceedings of the 8th USENIX Workshop on Hot Topics in Storage and File Systems, 2016

FLIC: Fast, lightweight checkpointing for mobile virtualization using NVRAM.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Distributed reconfigurable Battery System Management Architectures.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

MCSSim: A memory channel storage simulator.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

NVMcached: An NVM-based Key-Value Cache.
Proceedings of the 7th ACM SIGOPS Asia-Pacific Workshop on Systems, 2016

2015
A Scale Self-Adaptive Tracking Method Based on Moment Invariants.
Signal Processing Systems, 2015

WCET-Aware Energy-Efficient Data Allocation on Scratchpad Memory for Real-Time Embedded Systems.
IEEE Trans. VLSI Syst., 2015

Lazy-RTGC: A Real-Time Lazy Garbage Collection Mechanism with Jointly Optimizing Average and Worst Performance for NAND Flash Memory Storage Systems.
ACM Trans. Design Autom. Electr. Syst., 2015

Towards Write-Activity-Aware Page Table Management for Non-volatile Main Memories.
ACM Trans. Embedded Comput. Syst., 2015

Temperature-Aware Data Allocation for Embedded Systems with Cache and Scratchpad Memory.
ACM Trans. Embedded Comput. Syst., 2015

Endurance-Aware Allocation of Data Variables on NVM-Based Scratchpad Memory in Real-Time Embedded Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2015

On-Demand Block-Level Address Mapping in Large-Scale NAND Flash Storage Systems.
IEEE Trans. Computers, 2015

Adaptive security management of real-time storage applications over NAND based storage systems.
J. Network and Computer Applications, 2015

LSM-trie: An LSM-tree-based Ultra-Large Key-Value Store for Small Data Items.
Proceedings of the 2015 USENIX Annual Technical Conference, 2015

Selfie: co-locating metadata and data to enable fast virtual block devices.
Proceedings of the 8th ACM International Systems and Storage Conference, 2015

Optimizing deterministic garbage collection in NAND flash storage systems.
Proceedings of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium, 2015

Ard-mu-Copter: A Simple Open Source Quadcopter Platform.
Proceedings of the 11th International Conference on Mobile Ad-hoc and Sensor Networks, 2015

File system-independent block device support for storage class memory.
Proceedings of the 2015 IEEE Conference on Computer Communications Workshops, 2015

A quadcopter swarm for active monitoring of smog propagation.
Proceedings of the ACM/IEEE Sixth International Conference on Cyber-Physical Systems, 2015

NV-CFS: NVRAM-Assisted Scheduling Optimization for Virtualized Mobile Systems.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

TLC-FTL: Workload-Aware Flash Translation Layer for TLC/SLC Dual-Mode Flash Memory in Embedded Systems.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

SmartBackup: An Efficient and Reliable Backup Strategy for Solid State Drives with Backup Capacitors.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Virtual Machine Image Content Aware I/O Optimization for Mobile Virtualization.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Nonvolatile main memory aware garbage collection in high-level language virtual machine.
Proceedings of the 2015 International Conference on Embedded Software, 2015

Balloonfish: Utilizing morphable resistive memory in mobile virtualization.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

A Garbage Collection Aware Stripping method for Solid-State Drives.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Unified non-volatile memory and NAND flash memory architecture in smartphones.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Loop Transforming for Reducing Data Alignment on Multi-Core SIMD Processors.
Signal Processing Systems, 2014

A Reliability Enhanced Address Mapping Strategy for Three-Dimensional (3-D) NAND Flash Memory.
IEEE Trans. VLSI Syst., 2014

Memory-Aware Task Scheduling with Communication Overhead Minimization for Streaming Applications on Bus-Based Multiprocessor System-on-Chips.
IEEE Trans. Parallel Distrib. Syst., 2014

A Reliability-Aware Address Mapping Strategy for NAND Flash Memory Storage Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2014

Application-Specific Wear Leveling for Extending Lifetime of Phase Change Memory in Embedded Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2014

Loop scheduling with memory access reduction subject to register constraints for DSP applications.
Softw., Pract. Exper., 2014

Analysis of worst-case backlog bounds for Networks-on-Chip.
Journal of Systems Architecture - Embedded Systems Design, 2014

Optimizated Allocation of Data Variables to PCM/DRAM-based Hybrid Main Memory for Real-Time Embedded Systems.
Embedded Systems Letters, 2014

Virtual-machine metadata optimization for I/O traffic reduction in mobile virtualization.
Proceedings of the IEEE Non-Volatile Memory Systems and Applications Symposium, 2014

Building high-performance smartphones via non-volatile memory: The swap approach.
Proceedings of the 2014 International Conference on Embedded Software, 2014

Deterministic Crash Recovery for NAND Flash Based Storage Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

DPA: A data pattern aware error prevention technique for NAND flash lifetime extension.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
Optimally Removing Intercore Communication Overhead for Streaming Applications on MPSoCs.
IEEE Trans. Computers, 2013

Preface for the Special Issue of GreenCOM 2011.
Journal of Systems Architecture - Embedded Systems Design, 2013

Data-assemblage: a translation-page-aware data block allocation strategy for flash-based solid state drives.
Design Autom. for Emb. Sys., 2013

Thermal-Aware On-Chip Memory Architecture Exploration.
Proceedings of the 12th IEEE International Conference on Trust, 2013

SolarTune: Real-time scheduling with load tuning for solar energy powered multicore systems.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

Online optimization of security-sensitive real-time storage applications for NAND flash memory storage systems.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

FTL2: a hybrid flash translation layer with logging for write reduction in flash memory.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013

BLog: block-level log-block management for NAND flash memorystorage systems.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013

DHeating: Dispersed heating repair for self-healing NAND flash memory.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

Optimizing translation information management in NAND flash memory storage systems.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

Curling-PCM: Application-specific wear leveling for phase change memory based embedded systems.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
A Space Reuse Strategy for Flash Translation Layers in SLC NAND Flash Memory Storage Systems.
IEEE Trans. VLSI Syst., 2012

Optimally Maximizing Iteration-Level Loop Parallelism.
IEEE Trans. Parallel Distrib. Syst., 2012

Privacy aware publishing of successive location information in sensor networks.
Future Generation Comp. Syst., 2012

Staying-alive path planning with energy optimization for mobile robots.
Expert Syst. Appl., 2012

Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

Utilizing PCM for Energy Optimization in Embedded Systems.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

PTL: PCM Translation Layer.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

3D-FlashMap: A physical-location-aware block mapping strategy for 3D NAND flash memory.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Meta-Cure: a reliability enhancement strategy for metadata in NAND flash memory storage systems.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Write-activity-aware page table management for PCM-based embedded systems.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
On Reducing Hidden Redundant Memory Accesses for DSP Applications.
IEEE Trans. VLSI Syst., 2011

Overhead-aware energy optimization for real-time streaming applications on multiprocessor System-on-Chip.
ACM Trans. Design Autom. Electr. Syst., 2011

On Improving Real-Time Interrupt Latencies of Hybrid Operating Systems with Two-Level Hardware Interrupts.
IEEE Trans. Computers, 2011

Compiler-assisted dynamic scratch-pad memory management with space overlapping for embedded systems.
Softw., Pract. Exper., 2011

Special issue: Design and optimization for embedded and real-time computing systems and applications.
Journal of Systems Architecture - Embedded Systems Design, 2011

Preface.
J. Comput. Sci. Technol., 2011

PCM-FTL: A Write-Activity-Aware NAND Flash Memory Management Scheme for PCM-Based Embedded Systems.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011

A Two-Level Caching Mechanism for Demand-Based Page-Level Address Mapping in NAND Flash Memory Storage Systems.
Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011

An Efficient Approach of Power Reducing for Scratch-Pad Memory Based Embedded Systems.
Proceedings of the 2011 International Conference on Parallel Processing Workshops, 2011

An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems.
Proceedings of the Design, Automation and Test in Europe, 2011

MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems.
Proceedings of the 48th Design Automation Conference, 2011

2010
Design and Synthesis of a Multiprocessor System-on-Chip Architecture for Real-Time Biomedical Signal Processing in Gamma Cameras.
Signal Processing Systems, 2010

Dynamic and Leakage Energy Minimization With Soft Real-Time Loop Scheduling and Voltage Assignment.
IEEE Trans. VLSI Syst., 2010

Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding.
ACM Trans. Embedded Comput. Syst., 2010

Compiler-assisted leakage-aware loop scheduling for embedded VLIW DSP processors.
Journal of Systems and Software, 2010

An Optimal Algorithm towards Successive Location Privacy in Sensor Networks with Dynamic Programming.
IEICE Transactions, 2010

Dynamic scratch-pad memory management with data pipelining for embedded systems.
Concurrency and Computation: Practice and Experience, 2010

Memory-Aware Optimal Scheduling with Communication Overhead Minimization for Streaming Applications on Chip Multiprocessors.
Proceedings of the 31st IEEE Real-Time Systems Symposium, 2010

Optimal Task Scheduling by Removing Inter-Core Communication Overhead for Streaming Applications on MPSoC.
Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010

RNFTL: a reuse-aware NAND flash translation layer for flash memory.
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010

Cluster based architecture synthesis minimizing the resources under time constraint.
Proceedings of the IEEE International Conference on Acoustics, 2010

Demand-based block-level address mapping in large-scale NAND flash storage systems.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2009
Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded Systems.
Signal Processing Systems, 2009

Special issue of selected papers from EUC 2005.
J. Embedded Computing, 2009

Optimizing parallelism for nested loops with iterational and instructional retiming.
J. Embedded Computing, 2009

Energy minimization for heterogeneous wireless sensor networks.
J. Embedded Computing, 2009

Special Section On Embedded System And Software For IPC Guest Editorial - Guest Editorial.
Intelligent Automation & Soft Computing, 2009

An effective state-based predictive approach for leakage energy management on embedded systems.
Design Autom. for Emb. Sys., 2009

Loop scheduling with memory access reduction under register constraints for DSP applications.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Improving the Reliability of Embedded Systems with Cache and SPM.
Proceedings of the IEEE 6th International Conference on Mobile Adhoc and Sensor Systems, 2009

Joint Sleep Scheduling and Mode Assignment in Wireless Cyber-Physical Systems.
Proceedings of the 29th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2009 Workshops), 2009

Dynamic Scratch-Pad Memory Management with Data Pipelining for Embedded Systems.
Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, 2009

Optimal loop parallelization for maximizing iteration-level parallelism.
Proceedings of the 2009 International Conference on Compilers, 2009

2008
Optimized Address Assignment With Array and Loop Transformations for Minimizing Schedule Length.
IEEE Trans. on Circuits and Systems, 2008

Topology Aware Task Allocation and Scheduling for Real-Time Data Fusion Applications in Networked Embedded Sensor Systems.
Proceedings of the Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, 2008

Energy Efficient Operating Mode Assignment for Real-Time Tasks in Wireless Embedded Systems.
Proceedings of the Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, 2008

Topology-Aware Energy Efficient Task Assignment for Collaborative In-Network Processing in Distributed Sensor Systems.
Proceedings of the Distributed Embedded Systems: Design, 2008

Minimizing Leakage Energy with Modulo Scheduling for VLIW DSP Processors.
Proceedings of the Distributed Embedded Systems: Design, 2008

ISOS: Space Overlapping Based on Iteration Access Patterns for Dynamic Scratch-pad Memory Management in Embedded Systems.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

A Formal Specification and Verification Framework for Designing and Verifying Reliable and Dependable Software for Computerized Numerical Control (CNC) Systems.
Proceedings of the 28th IEEE International Conference on Distributed Computing Systems (ICDCS 2008), 2008

Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks.
Proceedings of the IEEE International Conference on Acoustics, 2008

Towards Successive Privacy Protection in Sensor Networks.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

A State-Based Predictive Approach for Leakage Reduction of Functional Units.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

Overhead-Aware System-Level Joint Energy and Performance Optimization for Streaming Applications on Multiprocessor Systems-on-Chip.
Proceedings of the 20th Euromicro Conference on Real-Time Systems, 2008

Effective Loop Partitioning and Scheduling under Memory and Register Dual Constraints.
Proceedings of the Design, Automation and Test in Europe, 2008

MPSOC Architectural Design and Synthesis for Real-Time Biomedical Signal Processing in Gamma Cameras.
Proceedings of the First International Conference on Biomedical Electronics and Devices, 2008

2007
Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping.
VLSI Signal Processing, 2007

Voltage Assignment with Guaranteed Probability Satisfying Timing Constraint for Real-time Multiproceesor DSP.
VLSI Signal Processing, 2007

Real-Time Dynamic Voltage Loop Scheduling for Multi-Core Embedded Systems.
IEEE Trans. on Circuits and Systems, 2007

An efficient algorithm for dynamic shortest path tree update in network routing.
Journal of Communications and Networks, 2007

Analysis and algorithms design for the partition of large-scale adaptive mobile wireless networks.
Computer Communications, 2007

Implementing Hybrid Operating Systems with Two-Level Hardware Interrupts.
Proceedings of the 28th IEEE Real-Time Systems Symposium (RTSS 2007), 2007

Real-Time Loop Scheduling with Leakage Energy Minimization for Embedded VLIW DSP Processors.
Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 2007

A Loop-Based Key Management Scheme for Wireless Sensor Networks.
Proceedings of the Emerging Directions in Embedded and Ubiquitous Computing, 2007

Parallel Network Intrusion Detection on Reconfigurable Platforms.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2007

Interconnection Synthesis of MPSoC Architecture for Gamma Cameras.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2007

Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2007

Energy minimization with soft real-time and DVS for uniprocessor and multiprocessor embedded systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Loop scheduling with timing and switching-activity minimization for VLIW DSP.
ACM Trans. Design Autom. Electr. Syst., 2006

Optimizing Address Assignment and Scheduling for DSPs With Multiple Functional Units.
IEEE Trans. on Circuits and Systems, 2006

Security Protection and Checking for Embedded System Integration against Buffer Overflow Attacks via Hardware/Software.
IEEE Trans. Computers, 2006

Design optimization and space minimization considering timing and code size via retiming and unfolding.
Microprocessors and Microsystems, 2006

Hardware/software optimization for array & pointer boundary checking against buffer overflow attacks.
J. Parallel Distrib. Comput., 2006

Algorithms and analysis of scheduling for loops with minimum switching.
IJCSE, 2006

Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture.
Proceedings of the 12th International Conference on Parallel and Distributed Systems, 2006

Loop Striping: Maximize Parallelism for Nested Loops.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006

Distributed Proximity-Aware Peer Clustering in BitTorrent-Like Peer-to-Peer Networks.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006

Efficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network.
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006

Voltage Assignment and Loop Scheduling for Energy Minimization while Satisfying Timing Constraint with Guaranteed Probability.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005
Efficient Assignment and Scheduling for Heterogeneous DSP Systems.
IEEE Trans. Parallel Distrib. Syst., 2005

Optimal Assignment with Guaranteed Confidence Probability for Trees on Heterogeneous DSP Systems.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2005

Efficient Array & Pointer Bound Checking Against Buffer Overflow Attacks via Hardware/Software.
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005

Maximum Loop Distribution and Fusion for Two-level Loops Considering Code Size.
Proceedings of the 8th International Symposium on Parallel Architectures, 2005

Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems.
Proceedings of the 11th International Conference on Parallel and Distributed Systems, 2005

Optimizing DSP scheduling via address assignment with array and loop transformation.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

Optimizing Nested Loops with Iterational and Instructional Retiming.
Proceedings of the Embedded and Ubiquitous Computing, 2005

Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs.
Proceedings of the Embedded and Ubiquitous Computing, 2005

Iterational retiming: maximize iteration-level parallelism for nested loops.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

High-level synthesis for DSP applications using heterogeneous functional units.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Multi-level Loop Fusion with Minimal Code Size.
Proceedings of the ISCA 18th International Conference on Parallel and Distributed Computing Systems, 2005

2004
Algorithms and analysis of scheduling for low-power high-performance DSP on VLIW processors.
IJHPCN, 2004

Security Protection and Checking in Embedded System Integration Against Buffer Overflow Attacks.
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004

Dynamic Update of Shortest Path Tree in OSPF.
Proceedings of the 7th International Symposium on Parallel Architectures, 2004

Assignment and Scheduling of Real-time DSP Applications for Heterogeneous Functional Units.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Timing Optimization of Nested Loops Considering Code Size for DSP Applications.
Proceedings of the 33rd International Conference on Parallel Processing (ICPP 2004), 2004

Dynamic shortest path tree update for multiple link state decrements.
Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004

Optimizing Address Assignment for Scheduling Embedded DSPs.
Proceedings of the Embedded and Ubiquitous Computing, 2004

Loop Scheduling for Real-Time DSPs with Minimum Switching Activities on Multiple-Functional-Unit Architectures.
Proceedings of the Embedded and Ubiquitous Computing, 2004

General loop fusion technique for nested loops considering timing and code size.
Proceedings of the 2004 International Conference on Compilers, 2004

Switching-Activity Minimization on Instruction-Level Loop Scheduling for VLIWDSP Applications.
Proceedings of the 15th IEEE International Conference on Application-Specific Systems, 2004

Loop Fusion via Retiming for DSP Applications.
Proceedings of the ISCA 17th International Conference on Parallel and Distributed Computing Systems, 2004

2003
Loop scheduling for minimizing schedule length and switching activities.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design space minimization with timing and code size optimization for embedded DSP.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

Defending Embedded Systems Against Buffer Overflow via Hardware/Software.
Proceedings of the 19th Annual Computer Security Applications Conference (ACSAC 2003), 2003

Design and Analysis of Improved Shortest Path Tree Update for Network Routing.
Proceedings of the ISCA 16th International Conference on Parallel and Distributed Computing Systems, 2003

2002
Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops.
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002


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