Cheol-Jong Woo

According to our database, Cheol-Jong Woo authored at least 5 papers between 2009 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip.

Kihyuk Han, Joonsung Park, Jae Wook Lee, Jaeyong Chung, Eonjo Byun, Cheol-Jong Woo, Sejang Oh, Jacob A. Abraham

J. Electron. Test., 2011

2010

Reducing test time and area overhead of an embedded memory array built-in repair analyzer with optimal repair rate.

Jaeyong Chung, Joonsung Park, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

A Built-In Self-Test scheme for high speed I/O using cycle-by-cycle edge control.

Hyunjin Kim, Jaeyong Chung, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo

Proceedings of the 15th European Test Symposium, 2010

At-speed Test of High-Speed DUT Using Built-Off Test Interface.

Joonsung Park, Jae Wook Lee, Jaeyong Chung, Kihyuk Han, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo, Sejang Oh

Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009

Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip.

Kihyuk Han, Joonsung Park, Jae Wook Lee, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo, Sejang Oh

Proceedings of the 14th IEEE European Test Symposium, 2009