Joonsung Park

According to our database1, Joonsung Park authored at least 17 papers between 2006 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2021
Fault-based Built-in Self-test and Evaluation of Phase Locked Loops.
ACM Trans. Design Autom. Electr. Syst., 2021

2019
Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection.
Proceedings of the 24th IEEE European Test Symposium, 2019

2017
High precision yet wide range on-chip oscillator with dual charge-discharge technique.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

A 12-/14-bit, 4/2MSPS, 0.085mm<sup>2</sup> SAR ADC in 65nm using novel residue boosting.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
An oxide electrothermal filter in standard CMOS.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

2015
An Embedded 65 nm CMOS Remote Temperature Sensor With Digital Beta Correction and Series Resistance Cancellation Achieving an Inaccuracy of 0.4<sup>°</sup>C (3σ) From - 40<sup>°</sup>C to 130<sup>°</sup>C.
IEEE J. Solid State Circuits, 2015

2013
A Built-In Repair Analyzer With Optimal Repair Rate for Word-Oriented Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2011
Pseudorandom Test of Nonlinear Analog and Mixed-Signal Circuits Based on a Volterra Series Model.
J. Electron. Test., 2011

Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip.
J. Electron. Test., 2011

2010
Spectral Prediction for Specification-Based Loopback Test of Embedded Mixed-Signal Circuits.
J. Electron. Test., 2010

Reducing test time and area overhead of an embedded memory array built-in repair analyzer with optimal repair rate.
Proceedings of the 28th IEEE VLSI Test Symposium, 2010

At-speed Test of High-Speed DUT Using Built-Off Test Interface.
Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009
Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip.
Proceedings of the 14th IEEE European Test Symposium, 2009

LFSR-Based Performance Characterization of Nonlinear Analog and Mixed-Signal Circuits.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008
Parallel Loopback Test of Mixed-Signal Circuits.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

2007
Pseudorandom Test for Nonlinear Circuits Based on a Simplified Volterra Series Model.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2006
Built-in Fault Diagnosis for Tunable Analog Systems Using an Ensemble Method.
Proceedings of the 2006 IEEE International Test Conference, 2006


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