Chifeng Wang

According to our database1, Chifeng Wang authored at least 10 papers between 2010 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Design and analysis of a mesh-based wireless network-on-chip.
J. Supercomput., 2015

2014
Design and evaluation of a high throughput QoS-aware and congestion-aware router architecture for Network-on-Chip.
Microprocess. Microsystems, 2014

2013
Scalable load balancing congestion-aware Network-on-Chip router architecture.
J. Comput. Syst. Sci., 2013

2012
A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms.
Microprocess. Microsystems, 2012

High-throughput differentiated service provision router architecture for wireless network-on-chip.
Int. J. High Perform. Syst. Archit., 2012

Design and evaluation of a high throughput robust router for network-on-chip.
IET Comput. Digit. Tech., 2012

2011
Area and power-efficient innovative congestion-aware Network-on-Chip architecture.
J. Syst. Archit., 2011

A Wireless Network-on-Chip Design for Multicore Platforms.
Proceedings of the 19th International Euromicro Conference on Parallel, 2011

2010
Area and Power-efficient Innovative Network-on-Chip Architecurte.
Proceedings of the 18th Euromicro Conference on Parallel, 2010

A scalable delay insensitive asynchronous NoC with adaptive routing.
Proceedings of the 17th International Conference on Telecommunications, 2010


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