Chris D. Chalk

According to our database1, Chris D. Chalk authored at least 5 papers between 1996 and 2004.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2004
Generation and Verification of Tests for Analog Circuits Subject to Process Parameter Deviations.
J. Electron. Test., 2004

2000
Applying a robust heteroscedastic probabilistic neural network toanalog fault detection and classification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1998
A design for test technique to increase the resolution of analogue supply current tests.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1997
Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations.
Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997

1996
Analogue Fault Modelling and Simulation for Supply Current Monitoring.
Proceedings of the 1996 European Design and Test Conference, 1996


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