Christian Berthet

CoRR, 2017

Approximation of LRU Caches Miss Rate: Application to Power-law Popularities.

[BibT_eX]

[DOI]

CoRR, 2017

On Von Schelling Formula for the Generalized Coupon Collector Problem.

[BibT_eX]

[DOI]

CoRR, 2017

2016

Identity of King and Flajolet & al. Formulae for LRU Miss Rate Exact Computation.

[BibT_eX]

[DOI]

CoRR, 2016

2012

Peak power estimation using activity measured on emulator.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2002

Going mobile: the next horizon for multi-million gate designs in the semi-conductor industry.

[BibT_eX]

[DOI]

Proceedings of the 39th Design Automation Conference, 2002

1996

Functional Verification Methodology of Chameleon Processor.

[BibT_eX]

[DOI]

Françoise Casaubieilh

Proceedings of the 33st Conference on Design Automation, 1996

1992

Synthesis of VHDL arrays on RAM cells.

[BibT_eX]

[DOI]

Jérôme Rampon

L. Sponga

Proceedings of the conference on European design automation, 1992

1990

New ideas on symbolic manipulations of finite state machines.

[BibT_eX]

[DOI]

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Formal boolean manipulations for the verification of sequential machines.

[BibT_eX]

[DOI]

Proceedings of the European Design Automation Conference, 1990

Verifying Temporal Properties of Sequential Machines Without Building their State Diagrams.

[BibT_eX]

[DOI]

Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990

1989

Verification of Synchronous Sequential Machines Based on Symbolic Execution.

[BibT_eX]

[DOI]

Proceedings of the Automatic Verification Methods for Finite State Systems, 1989

1988

An Algebraic Model for Asynchronous Circuits Verification.

[BibT_eX]

[DOI]