Philippe Georgelin

According to our database1, Philippe Georgelin authored at least 5 papers between 2000 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2012
Peak power estimation using activity measured on emulator.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2006
Towards a C++-based design methodology facilitating sequential equivalence checking.
Proceedings of the 43rd Design Automation Conference, 2006

2001
Vérification formelle de systèmes digitaux synchrones, basée sur la simulation symbolique. (Formal verification of synchronous digital designs, based on symbolic simulation).
PhD thesis, 2001

2000
Using the ACL2 Theorem Prover to Reason about VHDL Components.
RITA, 2000

An ACL2 Model of VHDL for Symbolic Simulation and Formal Verification.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000


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