Christoph Baumhof

According to our database1, Christoph Baumhof authored at least 7 papers between 1995 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Article 
PhD thesis 
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Links

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Bibliography

2013
A BCH decoding architecture with mixed parallelization degrees for flash controller applications.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

2005
A digitally programmable on-chip RC-oscillator in 0.25µm CMOS logic process.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003
Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks.
Telecommun. Syst., 2003

1997
A novel 32 bit RISC architecture unifying RISC and DSP.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1996
Ein Vektorarithmetik-Koprozessor in VLSI-Technik zur Unterstützung des Wissenschaftlichen Rechnens.
PhD thesis, 1996

A VLSI vector arithmetic coprocessor for the PCs.
RITA, 1996

1995
A New VLSI Vector Arithmetic Coprocessor for the PC.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995


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