Chuandong Chen

According to our database, Chuandong Chen authored at least 9 papers between 2018 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2025

Obstacle-Avoiding X-Architecture Bounded-Skew Tree Algorithm Under Timing Slack Constraints.

Genggeng Liu, Ren Lu, Yuhan Zhu, Zhifeng Lin, Chuandong Chen, Min Gan, Jianli Chen, Wenzhong Guo

IEEE Trans. Syst. Man Cybern. Syst., December, 2025

A Matching-Based Escape Routing Algorithm With Variable Design Rules and Multiple Constraints.

Chuandong Chen, Disi Lin, Qinghai Liu, Huan He, Zhifeng Lin, Genggeng Liu, Jianli Chen, Yao-Wen Chang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2025

An analytical timing-driven placer for modern heterogeneous FPGAs.

Zhifeng Lin, Yilu Chen, Yanyue Xie, Chuandong Chen, Jun Yu, Jianli Chen

J. Supercomput., January, 2025

Two stage Ordered Escape Routing combined with LP and heuristic algorithm for large scaled PCB.

Disi Lin, Chuandong Chen, Rongshan Wei, Qinghai Liu, Huan He, Ziran Zhu, Zhifeng Lin, Jianli Chen

Integr., 2025

2023

Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints.

Qinghai Liu, Qinfei Tang, Jiarui Chen, Chuandong Chen, Ziran Zhu, Huan He, Jianli Chen, Yao-Wen Chang

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

A Matching Based Escape Routing Algorithm with Variable Design Rules and Constraints.

Qinghai Liu, Disi Lin, Chuandong Chen, Huan He, Jianli Chen, Yao-Wen Chang

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Efficient Global Optimization for Large Scaled Ordered Escape Routing.

Chuandong Chen, Dishi Lin, Rongshan Wei, Qinghai Liu, Ziran Zhu, Jianli Chen

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2019

A Multi-Interval Homotopy Analysis Method Using Multi-Objective Optimization for Analytically Analyzing Chaotic Dynamics in Memristive Circuit.

Wei Hu, Haibo Luo, Chuandong Chen, Rongshan Wei

IEEE Access, 2019

2018

Novel Verification Method for Timing Optimization Based on DPSO.

Chuandong Chen, Rongshan Wei, Shaohao Wang, Wei Hu

VLSI Design, 2018