Jianli Chen

Orcid: 0000-0001-5405-8441

According to our database1, Jianli Chen authored at least 113 papers between 2011 and 2024.

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Bibliography

2024
High-Performance Placement Engine for Modern Large-Scale FPGAs With Heterogeneity and Clock Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

An Effective Routing Refinement Algorithm Based on Incremental Replacement and Rerouting.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

An effective routability-driven packing algorithm for large-scale heterogeneous FPGAs.
Integr., January, 2024

2023
Analytical Placement with 3D Poisson's Equation and ADMM-based Optimization for Large-scale 2.5D Heterogeneous FPGAs.
ACM Trans. Design Autom. Electr. Syst., September, 2023

Optimal location planning of electric bus charging stations with integrated photovoltaic and energy storage system.
Comput. Aided Civ. Infrastructure Eng., July, 2023

Incremental 3-D Global Routing Considering Cell Movement and Complex Routing Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

An agent-based modeling approach for public charging demand estimation and charging station location optimization at urban scale.
Comput. Environ. Urban Syst., April, 2023

Community time-activity trajectory modeling based on Markov chain simulation and Dirichlet regression.
Comput. Environ. Urban Syst., March, 2023

Caspian Sea Level Change Observed by Satellite Altimetry.
Remote. Sens., February, 2023

Comparison of GRACE/GRACE-FO Spherical Harmonic and Mascon Products in Interpreting GNSS Vertical Loading Deformations over the Amazon Basin.
Remote. Sens., January, 2023

Clash context representation and change component prediction based on graph convolutional network in MEP disciplines.
Adv. Eng. Informatics, January, 2023

Assistance from the Ambient Intelligence: Cyber-physical​ system applications in smart buildings for cognitively declined occupants.
Eng. Appl. Artif. Intell., 2023

Taxonomy, Semantic Data Schema, and Schema Alignment for Open Data in Urban Building Energy Modeling.
CoRR, 2023

Analytical Solution of Poisson's Equation with Application to VLSI Global Placement.
CoRR, 2023

eSSpMV: An Embedded-FPGA-based Hardware Accelerator for Symmetric Sparse Matrix-Vector Multiplication.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

FET-OPU: A Flexible and Efficient FPGA-Based Overlay Processor for Transformer Networks.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

g-BERT: Enabling Green BERT Deployment on FPGA via Hardware-Aware Hybrid Pruning.
Proceedings of the IEEE International Conference on Communications, 2023

LTrans-OPU: A Low-Latency FPGA-Based Overlay Processor for Transformer Networks.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Transformer-OPU: An FPGA-based Overlay Processor for Transformer Networks.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

Toward Optimal Filler Cell Insertion with Complex Implant Layer Constraints.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

A Matching Based Escape Routing Algorithm with Variable Design Rules and Constraints.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Mixed-cell-height Placement with Minimum-Implant-Area and Drain-to-Drain Abutment Constraints.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Efficient Global Optimization for Large Scaled Ordered Escape Routing.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Effective Analytical Placement for Advanced Face-to-Face-Bonded Circuit Designs.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022
Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design.
ACM Trans. Design Autom. Electr. Syst., 2022

An Incremental Placement Flow for Advanced FPGAs With Timing Awareness.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Mixed-Cell-Height Placement With Drain-to-Drain Abutment and Region Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Mixed-Cell-Height Placement With Complex Minimum-Implant-Area Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Novel Proximal Group ADMM for Placement Considering Fogging and Proximity Effects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Timing-Aware Fill Insertions With Design-Rule and Density Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Weighted thresholding homotopy method for sparsity constrained optimization.
J. Comb. Optim., 2022

Label-aware graph representation learning for multi-label image classification.
Neurocomputing, 2022

An activity-based spatial-temporal community electricity vulnerability assessment framework.
CoRR, 2022

Community Time-Activity Trajectory Modelling based on Markov Chain Simulation and Dirichlet Regression.
CoRR, 2022

A Robust Global Routing Engine with High-Accuracy Cell Movement under Advanced Constraints.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

High-performance placement for large-scale heterogeneous FPGAs with clock constraints.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

CNN-inspired analytical global placement for large-scale heterogeneous FPGAs.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Subgraph matching based reference placement for PCB designs: late breaking results.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

High-Correlation 3D Routability Estimation for Congestion-guided Global Routing.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

Voronoi Diagram Based Heterogeneous Circuit Layout Centerline Extraction for Mask Verification.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
A Robust Modulus-Based Matrix Splitting Iteration Method for Mixed-Cell-Height Circuit Legalization.
ACM Trans. Design Autom. Electr. Syst., 2021

Mixed-Cell-Height Detailed Placement Considering Complex Minimum-Implant-Area Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Analytical Placement Considering the Electron-Beam Fogging Effect.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Uncertainty Assessments of Load Deformation from Different GPS Time Series Products, GRACE Estimates and Model Predictions: A Case Study over Europe.
Remote. Sens., 2021

Impact of Large-Scale Ocean-Atmosphere Interactions on Interannual Water Storage Changes in the Tropics and Subtropics.
Remote. Sens., 2021

Sea-Level Fingerprints Due to Present-Day Water Mass Redistribution in Observed Sea-Level Data.
Remote. Sens., 2021

An Adaptive Neural Architecture Search Design for Collaborative Edge-Cloud Computing.
IEEE Netw., 2021

Stochastic simulation of residential building occupant-driven energy use in a bottom-up model of the U.S. housing stock.
CoRR, 2021

Times Series Forecasting for Urban Building Energy Consumption Based on Graph Convolutional Network.
CoRR, 2021

Topology-Aware Bus Routing in Complex Networks of Very-Large-Scale Integration with Nonuniform Track Configurations and Obstacles.
Complex., 2021

DATC RDF-2021: Design Flow and Beyond ICCAD Special Session Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Timing-Driven Placement for FPGAs with Heterogeneous Architectures and Clock Constraints.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Late Breaking Results: Incremental 3D Global Routing Considering Cell Movement.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Low-Cost Lithography Hotspot Detection with Active Entropy Sampling and Model Calibration.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Two-Stage Neural Network Classifier for the Data Imbalance Problem with Application to Hotspot Detection.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Late Breaking Results: Novel Discrete Dynamic Filled Function Algorithm for Acyclic Graph Partitioning.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Late Breaking Results: Heterogeneous Circuit Layout Centerline Extraction for Mask Verification.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Late Breaking Results: An Effective Legalization Algorithm for Heterogeneous FPGAs with Complex Constraints.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Analytical Global Placement for Heterogenous FPGAs Based on the eDensity Model.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

CongestNN: An Bi-Directional Congestion Prediction Framework for Large-Scale Heterogeneous FPGAs.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020
Mixed-Cell-Height Legalization Considering Technology and Region Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Clock-Aware Placement for Large-Scale Heterogeneous FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Improved Estimation of Regional Surface Mass Variations from GRACE Intersatellite Geopotential Differences Using a Priori Constraints.
Remote. Sens., 2020

Surface Mass Variations from GPS and GRACE/GFO: A Case Study in Southwest China.
Remote. Sens., 2020

Seismic Impact of Large Earthquakes on Estimating Global Mean Ocean Mass Change from GRACE.
Remote. Sens., 2020

Constrained Linear Deconvolution of GRACE Anomalies to Correct Spatial Leakage.
Remote. Sens., 2020

Mixed-cell-height legalization considering complex minimum width constraints and half-row fragmentation effect.
Integr., 2020

DSA guiding template assignment with multiple redundant via and dummy via insertion.
Integr., 2020

An Improved Simulated Annealing Algorithm With Excessive Length Penalty for Fixed-Outline Floorplanning.
IEEE Access, 2020

A Non-Gaussian Adaptive Importance Sampling Method for High-Dimensional and Multi-Failure-Region Yield Analysis.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

DATC RDF-2020: Strengthening the Foundation for Academic Research in IC Physical Design.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Time-Division Multiplexing Based System-Level FPGA Routing for Logic Verification.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Late Breaking Results: An Analytical Timing-Driven Placer for Heterogeneous FPGAs<sup>*</sup>.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Hamiltonian Path Based Mixed-Cell-Height Legalization for Neighbor Diffusion Effect Mitigation.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

An Efficient EPIST Algorithm for Global Placement with Non-Integer Multiple-Height Cells <sup>*</sup>.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Investigating occupancy profiles using convolutional neural networks.
Proceedings of the 6th ACM International Conference on Systems for Energy-Efficient Buildings, 2019

Analytical Mixed-Cell-Height Legalization Considering Average and Maximum Movement Minimization.
Proceedings of the 2019 International Symposium on Physical Design, 2019

Timing-Aware Fill Insertions with Design-Rule and Density Constraints.
Proceedings of the International Conference on Computer-Aided Design, 2019

Analytical Placement with 3D Poisson's Equation and ADMM Based Optimization for Large-Scale 2.5D Heterogeneous FPGAs.
Proceedings of the International Conference on Computer-Aided Design, 2019

DATC RDF-2019: Towards a Complete Academic Reference Design Flow.
Proceedings of the International Conference on Computer-Aided Design, 2019

A local optimal method on DSA guiding template assignment with redundant/dummy via insertion.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

An Effective Detailed Routing Algorithm Considering Advanced VLSI Technologies.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018
Graph-Based Redundant Via Insertion and Guiding Template Assignment for DSA-MP.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Discrete relaxation method for contact layer decomposition of DSA with triple patterning.
Integr., 2018

DATC RDF: An Open Design Flow from Logic Synthesis to Detailed Routing.
CoRR, 2018

Lagrange Dual Method for Sparsity Constrained Optimization.
IEEE Access, 2018

An Effective Corner Increment-Based Algorithm for the Two-Dimensional Strip Packing Problem.
IEEE Access, 2018

Mixed-cell-height legalization considering technology and region constraints.
Proceedings of the International Conference on Computer-Aided Design, 2018

Analytical solution of Poisson's equation and its application to VLSI global placement.
Proceedings of the International Conference on Computer-Aided Design, 2018

DATC RDF: an academic flow from logic synthesis to detailed routing.
Proceedings of the International Conference on Computer-Aided Design, 2018

Mixed-cell-height placement with complex minimum-implant-area constraints.
Proceedings of the International Conference on Computer-Aided Design, 2018

Novel proximal group ADMM for placement considering fogging and proximity effects.
Proceedings of the International Conference on Computer-Aided Design, 2018

Generalized augmented lagrangian and its applications to VLSI global placement.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Long-Term Water Storage Changes of Lake Volta from GRACE and Satellite Altimetry and Connections with Regional Climate.
Remote. Sens., 2017

An adaptive hybrid memetic algorithm for thermal-aware non-slicing VLSI floorplanning.
Integr., 2017

Toward Optimal Legalization for Mixed-Cell-Height Circuit Designs.
Proceedings of the 54th Annual Design Automation Conference, 2017

An effective legalization algorithm for mixed-cell-height standard cells.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Cut redistribution and DSA template assignment for unidirectional design.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
Nonsmooth Optimization Method for VLSI Global Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

A proximal alternating direction method of multipliers for a minimization problem with nonconvex constraints.
J. Glob. Optim., 2015

A VLSI global placement solver based on proximal alternating direction method.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
An augmented Lagrangian method for VLSI global placement.
J. Supercomput., 2014

A Placement Flow for Very Large-Scale mixed-Size Circuit Placement.
J. Circuits Syst. Comput., 2014

A scaled LSE wirelength model for VLSI global placement.
Proceedings of the 11th International Conference on Fuzzy Systems and Knowledge Discovery, 2014

2012
An Analytical Placer for VLSI Standard Cell Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

A heuristic algorithm for the strip packing problem.
J. Heuristics, 2012

Pricing CDO tranches with stochastic correlation and random factor loadings in a mixture copula model.
Appl. Math. Comput., 2012

An Augmented Lagrangian Optimization Method for VLSI Global Placement.
Proceedings of the 13th International Conference on Parallel and Distributed Computing, 2012

A Social Benefit Comprehensive Evaluation Model Based on Unascertained Measure Expectation of Science and Technology Information Products.
Proceedings of the Information Computing and Applications - Third International Conference, 2012

2011
A Hybrid Simulated Annealing Algorithm for Nonslicing VLSI Floorplanning.
IEEE Trans. Syst. Man Cybern. Part C, 2011


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